[PATCH v11 8/9] spi: cadence: Change cs property reading.

From: Witold Sadowski
Date: Wed Jul 24 2024 - 11:50:08 EST


In current implementation cs property can be read only from
device-tree(for_each_available_child_of_node_scoped). Change it to fwnode
based read to allow property reading in ACPI case too.

Signed-off-by: Witold Sadowski <wsadowski@xxxxxxxxxxx>
Signed-off-by: Piyush Malgujar <pmalgujar@xxxxxxxxxxx>
---
drivers/spi/spi-cadence-xspi.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/spi-cadence-xspi.c b/drivers/spi/spi-cadence-xspi.c
index a129f33bfd38..28c1aea01743 100644
--- a/drivers/spi/spi-cadence-xspi.c
+++ b/drivers/spi/spi-cadence-xspi.c
@@ -837,15 +837,20 @@ static irqreturn_t cdns_xspi_irq_handler(int this_irq, void *dev)

static int cdns_xspi_of_get_plat_data(struct platform_device *pdev)
{
- struct device_node *node_prop = pdev->dev.of_node;
+ struct fwnode_handle *fwnode_child;
unsigned int cs;

- for_each_available_child_of_node_scoped(node_prop, node_child) {
- if (of_property_read_u32(node_child, "reg", &cs)) {
+ device_for_each_child_node(&pdev->dev, fwnode_child) {
+ if (!fwnode_device_is_available(fwnode_child))
+ continue;
+
+ if (fwnode_property_read_u32(fwnode_child, "reg", &cs)) {
dev_err(&pdev->dev, "Couldn't get memory chip select\n");
+ fwnode_handle_put(fwnode_child);
return -ENXIO;
} else if (cs >= CDNS_XSPI_MAX_BANKS) {
dev_err(&pdev->dev, "reg (cs) parameter value too large\n");
+ fwnode_handle_put(fwnode_child);
return -ENXIO;
}
}
--
2.43.0