Re: [PATCH v3 5/7] target/arm: preserve mpidr value

From: Jonathan Cameron
Date: Fri Jul 26 2024 - 08:50:35 EST


On Mon, 22 Jul 2024 08:45:57 +0200
Mauro Carvalho Chehab <mchehab+huawei@xxxxxxxxxx> wrote:

> There is a logic at helper to properly fill the mpidr information.
> This is needed for ARM Processor error injection, so store the
> value inside a cpu opaque value, to allow it to be used.
>
> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@xxxxxxxxxx>

Seems reasonable to me, but not really my area of expertise.
FWIW
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>

> ---
> target/arm/cpu.h | 1 +
> target/arm/helper.c | 10 ++++++++--
> 2 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index a12859fc5335..d2e86f0877cc 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -1033,6 +1033,7 @@ struct ArchCPU {
> uint64_t reset_pmcr_el0;
> } isar;
> uint64_t midr;
> + uint64_t mpidr;
> uint32_t revidr;
> uint32_t reset_fpsid;
> uint64_t ctr;
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index ce319572354a..2432b5b09607 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -4692,7 +4692,7 @@ static uint64_t mpidr_read_val(CPUARMState *env)
> return mpidr;
> }
>
> -static uint64_t mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri)
> +static uint64_t mpidr_read(CPUARMState *env)
> {
> unsigned int cur_el = arm_current_el(env);
>
> @@ -4702,6 +4702,11 @@ static uint64_t mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri)
> return mpidr_read_val(env);
> }
>
> +static uint64_t mpidr_read_ri(CPUARMState *env, const ARMCPRegInfo *ri)
> +{
> + return mpidr_read(env);
> +}
> +
> static const ARMCPRegInfo lpae_cp_reginfo[] = {
> /* NOP AMAIR0/1 */
> { .name = "AMAIR0", .state = ARM_CP_STATE_BOTH,
> @@ -9723,7 +9728,7 @@ void register_cp_regs_for_features(ARMCPU *cpu)
> { .name = "MPIDR_EL1", .state = ARM_CP_STATE_BOTH,
> .opc0 = 3, .crn = 0, .crm = 0, .opc1 = 0, .opc2 = 5,
> .fgt = FGT_MPIDR_EL1,
> - .access = PL1_R, .readfn = mpidr_read, .type = ARM_CP_NO_RAW },
> + .access = PL1_R, .readfn = mpidr_read_ri, .type = ARM_CP_NO_RAW },
> };
> #ifdef CONFIG_USER_ONLY
> static const ARMCPRegUserSpaceInfo mpidr_user_cp_reginfo[] = {
> @@ -9733,6 +9738,7 @@ void register_cp_regs_for_features(ARMCPU *cpu)
> modify_arm_cp_regs(mpidr_cp_reginfo, mpidr_user_cp_reginfo);
> #endif
> define_arm_cp_regs(cpu, mpidr_cp_reginfo);
> + cpu->mpidr = mpidr_read(env);
> }
>
> if (arm_feature(env, ARM_FEATURE_AUXCR)) {