Re: [PATCH] irqchip/gic-v4: Fix ordering between vmapp and vpe locks

From: Marc Zyngier
Date: Sun Jul 28 2024 - 05:42:44 EST


On Fri, 26 Jul 2024 21:52:40 +0100,
Thomas Gleixner <tglx@xxxxxxxxxxxxx> wrote:
>
> On Tue, Jul 23 2024 at 18:52, Marc Zyngier wrote:
> > @@ -3808,7 +3802,7 @@ static int its_vpe_set_affinity(struct irq_data *d,
> > struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
> > unsigned int from, cpu = nr_cpu_ids;
> > struct cpumask *table_mask;
> > - unsigned long flags;
> > + unsigned long flags, vmapp_flags;
>
> What's this flags business for? its_vpe_set_affinity() is called with
> interrupts disabled, no?

Duh. Of course. Cargo-culted braindead logic. I'll fix that.

>
> > /*
> > * Changing affinity is mega expensive, so let's be as lazy as
> > @@ -3822,7 +3816,14 @@ static int its_vpe_set_affinity(struct irq_data *d,
> > * protect us, and that we must ensure nobody samples vpe->col_idx
> > * during the update, hence the lock below which must also be
> > * taken on any vLPI handling path that evaluates vpe->col_idx.
> > + *
> > + * Finally, we must protect ourselves against concurrent
> > + * updates of the mapping state on this VM should the ITS list
> > + * be in use.
> > */
> > + if (its_list_map)
> > + raw_spin_lock_irqsave(&vpe->its_vm->vmapp_lock, vmapp_flags);
>
> Confused. This changes the locking from unconditional to
> conditional. What's the rationale here?

I think I'm confused too. I've written this as a mix of the VMOVP lock
(which must be conditional) and the new VMAPP lock, which must be
taken to avoid racing against a new vcpu coming up. And of course,
this makes zero sense.

I'll get some sleep first, and then fix this correctly. Thanks for
spotting it.

M.

--
Without deviation from the norm, progress is not possible.