Re: [PATCH v2 1/2] riscv: dts: sophgo: Use common "interrupt-parent" for all peripherals for sg2042

From: Chen Wang
Date: Tue Jul 30 2024 - 03:50:34 EST



On 2024/7/29 10:13, Inochi Amaoto wrote:
As all peripherals of sg2042 share the same "interrupt-parent",
there is no need to use peripherals specific "interrupt-parent".
Define "interrupt-parent" in the SoC level.

Signed-off-by: Inochi Amaoto <inochiama@xxxxxxxxxxx>

Reviewed-by: Chen Wang <unicorn_wang@xxxxxxxxxxx>

Tested-by: Chen Wang <unicorn_wang@xxxxxxxxxxx>

---
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
index 34c802bd3f9b..c61d8061119d 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
@@ -44,6 +44,7 @@ soc: soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
+ interrupt-parent = <&intc>;
ranges;

pllclk: clock-controller@70300100c0 {
@@ -388,7 +389,6 @@ rstgen: reset-controller@7030013000 {
uart0: serial@7040000000 {
compatible = "snps,dw-apb-uart";
reg = <0x00000070 0x40000000 0x00000000 0x00001000>;
- interrupt-parent = <&intc>;
interrupts = <112 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <500000000>;
clocks = <&clkgen GATE_CLK_UART_500M>,
--
2.45.2