[PATCH v2 8/9] dt-bindings: clock: xilinx: describe whether dynamic reconfig is enabled

From: Harry Austen
Date: Sat Aug 03 2024 - 07:00:08 EST


Xilinx clocking wizard IP core's dynamic reconfiguration support is
optionally enabled at build time. Add a devicetree boolean property to
describe whether the hardware supports this feature or not.

Signed-off-by: Harry Austen <hpausten@xxxxxxxxxxxxxx>
---
v1 -> v2: Use "flag" instead of boolean type

.../devicetree/bindings/clock/xlnx,clocking-wizard.yaml | 7 +++++++
1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
index 9e5078cef2962..8b28a01dbb993 100644
--- a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
+++ b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
@@ -48,6 +48,12 @@ properties:
- const: monitor


+ xlnx,dynamic-reconfig:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ Indicate whether the core has been configured with support for dynamic
+ runtime reconfguration of the clocking primitive MMCM/PLL.
+
xlnx,speed-grade:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 2, 3]
@@ -91,6 +97,7 @@ examples:
compatible = "xlnx,clocking-wizard-v6.0";
reg = <0xb0000000 0x10000>;
#clock-cells = <1>;
+ xlnx,dynamic-reconfig;
xlnx,speed-grade = <1>;
xlnx,nr-outputs = <6>;
clock-names = "clk_in1", "s_axi_aclk";
--
2.46.0