Re: [PATCH] riscv: defconfig: sophgo: enable clks for sg2042

[Chen Wang]

On 2024/8/6 17:30, Emil Renner Berthing wrote:
> Chen Wang wrote:
> > From: Chen Wang <unicorn_wang@xxxxxxxxxxx>
> >
> > Enable clk generators for sg2042 due to many peripherals rely on
> > these clocks.
> >
> > Signed-off-by: Chen Wang <unicorn_wang@xxxxxxxxxxx>
> > ---
> >   arch/riscv/configs/defconfig | 3 +++
> >   1 file changed, 3 insertions(+)
> >
> > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> > index 0d678325444f..d43a028909e5 100644
> > --- a/arch/riscv/configs/defconfig
> > +++ b/arch/riscv/configs/defconfig
> > @@ -249,6 +249,9 @@ CONFIG_VIRTIO_BALLOON=y
> >   CONFIG_VIRTIO_INPUT=y
> >   CONFIG_VIRTIO_MMIO=y
> >   CONFIG_CLK_SOPHGO_CV1800=y
> > +CONFIG_CLK_SOPHGO_SG2042_PLL=y
> > +CONFIG_CLK_SOPHGO_SG2042_CLKGEN=y
> > +CONFIG_CLK_SOPHGO_SG2042_RPGATE=y
> >   CONFIG_SUN8I_DE2_CCU=m
> >   CONFIG_RENESAS_OSTM=y
> >   CONFIG_SUN50I_IOMMU=y
> Are these all critical to boot or could they be modules?
>
> /Emil

Since 6.11, sg2042.dtsi has been changed and uart now has dependency on 
clocks and boot into minimal console will fail without this.

The sg2042 clock is configured as builtin to facilitate bootup in 
initramfs with defconfig build.

Regards.

Chen

> > base-commit: de9c2c66ad8e787abec7c9d7eff4f8c3cdd28aed
> > --
> > 2.34.1
> >
> >
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