[tip: perf/core] perf/x86/intel/uncore: Use D0:F0 as a default device
From: tip-bot2 for Zhenyu Wang
Date: Wed Aug 07 2024 - 06:59:21 EST
The following commit has been merged into the perf/core branch of tip:
Commit-ID: aaad0e2aa50723969f96b690f72e2f4aefa433f2
Gitweb: https://git.kernel.org/tip/aaad0e2aa50723969f96b690f72e2f4aefa433f2
Author: Zhenyu Wang <zhenyuw@xxxxxxxxxxxxxxx>
AuthorDate: Wed, 31 Jul 2024 07:13:53 -07:00
Committer: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
CommitterDate: Mon, 05 Aug 2024 16:54:46 +02:00
perf/x86/intel/uncore: Use D0:F0 as a default device
Some uncore PMON registers are located in the MMIO space of the Host
Bridge and DRAM Controller device, which is located at D0:F0 for
Tiger Lake and later client generation.
Use D0:F0 as a default device. So it doesn't need to keep adding the
complete Device ID list for each generation anymore.
Signed-off-by: Zhenyu Wang <zhenyuw@xxxxxxxxxxxxxxx>
Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Reviewed-by: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
Link: https://lore.kernel.org/r/20240731141353.759643-5-kan.liang@xxxxxxxxxxxxxxx
---
arch/x86/events/intel/uncore_snb.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/x86/events/intel/uncore_snb.c b/arch/x86/events/intel/uncore_snb.c
index f7402bd..3934e1e 100644
--- a/arch/x86/events/intel/uncore_snb.c
+++ b/arch/x86/events/intel/uncore_snb.c
@@ -1504,6 +1504,10 @@ static struct pci_dev *tgl_uncore_get_mc_dev(void)
ids++;
}
+ /* Just try to grab 00:00.0 device */
+ if (!mc_dev)
+ mc_dev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
+
return mc_dev;
}