[PATCH net-next 1/3] dt-bindings: net: tja11xx: use reverse-mode to instead of rmii-refclk-in

[Wei Fang]

Per the MII and RMII specifications, for the standard RMII mode,
the REF_CLK is sourced from MAC to PHY or from an external source.
For the standard MII mode, the RX_CLK and TX_CLK are both sourced
by the PHY. But for TJA11xx PHYs, they support reverse mode, that
is, for revRMII mode, the REF_CLK is output, and for revMII mode,
the TX_CLK and RX_CLK are inputs to the PHY.
Previously the "nxp,rmii-refclk-in" was added to indicate that in
RMII mode, if this property present, REF_CLK is input to the PHY,
otherwise it is output. This seems inappropriate now. Firstly, for
the standard RMII mode, REF_CLK is originally input, and there is
no need to add the "nxp,rmii-refclk-in" property to indicate that
REF_CLK is input. Secondly, this property is not generic for TJA
PHYs, because it cannot cover the settings of TX_CLK and RX_CLK in
MII mode. Therefore, add new property "nxp,reverse-mode" to instead
of the "nxp,rmii-refclk-in" property.

Signed-off-by: Wei Fang <wei.fang@xxxxxxx>
---
 .../devicetree/bindings/net/nxp,tja11xx.yaml  | 21 +++++++------------
 1 file changed, 7 insertions(+), 14 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
index 85bfa45f5122..e8ab2cf8d4d4 100644
--- a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
+++ b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
@@ -32,21 +32,14 @@ patternProperties:
         description:
           The ID number for the child PHY. Should be +1 of parent PHY.
 
-      nxp,rmii-refclk-in:
+      nxp,reverse-mode:
         type: boolean
         description: |
-          The REF_CLK is provided for both transmitted and received data
-          in RMII mode. This clock signal is provided by the PHY and is
-          typically derived from an external 25MHz crystal. Alternatively,
-          a 50MHz clock signal generated by an external oscillator can be
-          connected to pin REF_CLK. A third option is to connect a 25MHz
-          clock to pin CLK_IN_OUT. So, the REF_CLK should be configured
-          as input or output according to the actual circuit connection.
-          If present, indicates that the REF_CLK will be configured as
-          interface reference clock input when RMII mode enabled.
-          If not present, the REF_CLK will be configured as interface
-          reference clock output when RMII mode enabled.
-          Only supported on TJA1100 and TJA1101.
+          If present, the TJA11xx PHY will operate in "reversed" role mode.
+          If XMII_MODE is set to MII, the device operates in revMII mode
+          (TXCLK and RXCLK are input).
+          If XMII_MODE is set to RMII, the device operates in revRMII mode
+          (REF_CLK is output).
 
     required:
       - reg
@@ -61,7 +54,7 @@ examples:
 
         tja1101_phy0: ethernet-phy@4 {
             reg = <0x4>;
-            nxp,rmii-refclk-in;
+            nxp,reverse-mode;
         };
     };
   - |
-- 
2.34.1