Re: [PATCH v2] iommu/arm-smmu-v3: Match Stall behaviour for S2

From: Robin Murphy
Date: Thu Aug 15 2024 - 08:16:35 EST


On 15/08/2024 12:30 pm, Mostafa Saleh wrote:
Hi Jason,

On Wed, Aug 14, 2024 at 12:51:51PM -0300, Jason Gunthorpe wrote:
On Wed, Aug 14, 2024 at 02:56:33PM +0000, Mostafa Saleh wrote:

Also described in the pseudocode “SteIllegal()”
if eff_idr0_stall_model == '10' && STE.S2S == '0' then
// stall_model forcing stall, but S2S == 0
return TRUE;

This clips out an important bit:

if STE.Config == '11x' then
[..]
if eff_idr0_stall_model == '10' && STE.S2S == '0' then
// stall_model forcing stall, but S2S == 0
return TRUE;

And here we are using STRTAB_STE_0_CFG_S1_TRANS which is 101 and won't
match the STE.Config qualification.

The plain text language said the S2S is only required if the S2 is
translating, STRTAB_STE_0_CFG_S1_TRANS puts it in bypass.

Yes, my bad, this should be for stage-2 only which is populated in
arm_smmu_make_s2_domain_ste()


+ /*
+ * S2S is ignored if stage-2 exists but not enabled.
+ * S2S is not compatible with ATS.
+ */
+ if (master->stall_enabled && !ats_enabled &&
+ smmu->features & ARM_SMMU_FEAT_TRANS_S2)
+ target->data[2] |= STRTAB_STE_2_S2S;

We can't ignore ATS if it was requested here.

I don't see much value in adding effectively-dead checks for something which is already forbidden by the architecture. The definition of STALL_MODEL explicitly states:

"An SMMU associated with a PCI system must not have STALL_MODEL == 0b10".

Thanks,
Robin.