[PATCH v5 0/3] pci: qcom: Add 16GT/s equalization and margining settings

From: Shashank Babu Chinta Venkata
Date: Wed Aug 21 2024 - 13:10:22 EST


Add 16GT/s specific equalization and rx lane margining settings. These
settings are inline with respective PHY settings for 16GT/s
operation.

In addition, current QCOM EP and RC drivers do not share common
codebase which would result in code duplication. Hence, adding
common files for code reusability among RC and EP drivers.

v4 -> v5:
- Added additional parameter bandwidth to accommodate new icc path.
- Fixed typo.
- Picked up Reviewed-by tags.

v3 -> v4:
- Addressed review comments from Mani and Konrad.
- Preceded subject line with pci: qcom: tags

v2 -> v3:
- Replaced FIELD_GET/FIELD_PREP macros for bit operations.
- Renamed cmn to common.
- Avoided unnecessary argument validations.
- Addressed review comments from Konrad and Mani.

v1 -> v2:
- Capitilized commit message to be inline with history
- Dropped stubs from header file.
- Moved Designware specific register offsets and masks to
pcie-designware.h header file.
- Applied settings based on bus data rate rather than link generation.
- Addressed review comments from Bjorn and Frank.

Shashank Babu Chinta Venkata (3):
PCI: qcom: Refactor common code
PCI: qcom: Add equalization settings for 16 GT/s
PCI: qcom: Add RX margining settings for 16 GT/s

MAINTAINERS | 3 +
drivers/pci/controller/dwc/Kconfig | 5 +
drivers/pci/controller/dwc/Makefile | 1 +
drivers/pci/controller/dwc/pcie-designware.h | 30 ++++
drivers/pci/controller/dwc/pcie-qcom-common.c | 156 ++++++++++++++++++
drivers/pci/controller/dwc/pcie-qcom-common.h | 17 ++
drivers/pci/controller/dwc/pcie-qcom-ep.c | 44 +----
drivers/pci/controller/dwc/pcie-qcom.c | 146 ++++++----------
8 files changed, 271 insertions(+), 131 deletions(-)
create mode 100644 drivers/pci/controller/dwc/pcie-qcom-common.c
create mode 100644 drivers/pci/controller/dwc/pcie-qcom-common.h

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2.46.0