Re: [PATCH v4 6/6] x86/tdx: Implement movs for MMIO
From: Kirill A. Shutemov
Date: Thu Aug 22 2024 - 04:30:16 EST
On Wed, Aug 21, 2024 at 04:24:38PM +0200, Alexey Gladkov wrote:
> From: "Alexey Gladkov (Intel)" <legion@xxxxxxxxxx>
>
Please capitalize MOVS in the subject.
> Add emulation of the MOVS instruction on MMIO regions. MOVS emulation
> consists of dividing it into a series of read and write operations,
> which in turn will be validated separately.
Commit message is pretty sparse. I think we need to elaborate on the
similarities and differences with SEV implementation. Locking context
difference is important.
> diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
> index a75a07f4931f..45136b1b02cc 100644
> --- a/arch/x86/include/asm/processor.h
> +++ b/arch/x86/include/asm/processor.h
> @@ -503,6 +503,10 @@ struct thread_struct {
> struct thread_shstk shstk;
> #endif
>
> +#ifdef CONFIG_INTEL_TDX_GUEST
> + unsigned long mmio_emul;
> +#endif
> +
> /* Floating point and extended processor state */
> struct fpu fpu;
> /*
Hm. Do we need to track exact target address in the thread struct?
Wouldn't be single bit be enough to allow MMIO to userspace address from a
kernel regs->ip?
There is space for the flag next to iopl_warn.
--
Kiryl Shutsemau / Kirill A. Shutemov