Re: [PATCH v3 4/8] arm64: dts: renesas: r9a09g057: Add RIIC0-RIIC8 nodes

From: Geert Uytterhoeven
Date: Mon Aug 26 2024 - 08:18:18 EST


Hi Prabhakar,

On Wed, Aug 21, 2024 at 10:56 AM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Add RIIC0-RIIC8 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> ---
> v2->v3
> - Grouped the I2C nodes
> - Dropped clock-frequency
> - Updated I2C nodes to match with the coding-style of DTS

Thanks for the update!

> --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> @@ -201,6 +201,195 @@ ostm3: timer@14001000 {
> status = "disabled";
> };
>
> + i2c8: i2c@11c01000 {

Usually we sort the instances within a group by instance number, i.e.

i2c0: i2c@14400400 {
i2c1: i2c@14400800 {
i2c2: i2c@14400c00 {
i2c3: i2c@14401000 {
i2c4: i2c@14401400 {
i2c5: i2c@14401800 {
i2c6: i2c@14401c00 {
i2c7: i2c@14402000 {
i2c8: i2c@11c01000 {

See e.g. the scif nodes in arch/arm64/boot/dts/renesas/r8a77951.dtsi:

scif0: serial@e6e60000 {
scif1: serial@e6e68000 {
scif2: serial@e6e88000 {
scif3: serial@e6c50000 {
scif4: serial@e6c40000 {
scif5: serial@e6f30000 {

scif3 and scif4 have lower base addresses than scif0.

The rest LGTM.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds