Quoting Bo Gan (2024-08-26 23:19:54)
In function `wrpll_configure_for_rate`, we try to determine the best PLL
configuration for a target rate. However, in the loop where we try values
of R, we should compare the derived `vco` with `target_vco_rate`. However,
we were in fact comparing it with `target_rate`, which is actually after
Q shift. This is incorrect, and sometimes can result in suboptimal clock
rates. This patch fixes it.
Signed-off-by: Bo Gan <ganboing@xxxxxxxxx>
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Please add a Fixes tag.
Also, your patch has tons of diff context. Why?