Re: [PATCH 22/22] arm64: dts: qcom: Add reduced functional DT for SA8255p Ride platform

From: Krzysztof Kozlowski
Date: Thu Aug 29 2024 - 03:50:42 EST


On 28/08/2024 22:37, Nikunj Kela wrote:
> SA8255p Ride platform is an automotive virtual platform. This platform
> abstracts resources such as clocks, regulators etc. in the firmware VM.
> The device drivers request resources operations over SCMI using power,
> performance, reset and sensor protocols.
>
> Multiple virtual SCMI instances are being employed for greater parallelism.
> These instances are tied to devices such that devices can have dedicated
> SCMI channel. Firmware VM (runs SCMI platform stack) is SMP enabled and
> can process requests from agents in parallel. Qualcomm smc transport is
> used for communication between SCMI agent and platform.
>
> Let's add the reduced functional support for SA8255p Ride board.
> Subsequently, the support for PCIe, USB, UFS, Ethernet will be added.
>
> Co-developed-by: Shazad Hussain <quic_shazhuss@xxxxxxxxxxx>
> Signed-off-by: Shazad Hussain <quic_shazhuss@xxxxxxxxxxx>
> Signed-off-by: Nikunj Kela <quic_nkela@xxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> arch/arm64/boot/dts/qcom/sa8255p-pmics.dtsi | 80 +
> arch/arm64/boot/dts/qcom/sa8255p-ride.dts | 149 ++
> arch/arm64/boot/dts/qcom/sa8255p-scmi.dtsi | 2312 ++++++++++++++++++
> arch/arm64/boot/dts/qcom/sa8255p.dtsi | 2405 +++++++++++++++++++
> 5 files changed, 4947 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/sa8255p-pmics.dtsi
> create mode 100644 arch/arm64/boot/dts/qcom/sa8255p-ride.dts
> create mode 100644 arch/arm64/boot/dts/qcom/sa8255p-scmi.dtsi
> create mode 100644 arch/arm64/boot/dts/qcom/sa8255p.dtsi
>

...

> diff --git a/arch/arm64/boot/dts/qcom/sa8255p-ride.dts b/arch/arm64/boot/dts/qcom/sa8255p-ride.dts
> new file mode 100644
> index 000000000000..1dc03051ad92
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sa8255p-ride.dts
> @@ -0,0 +1,149 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +
> +#include "sa8255p.dtsi"
> +#include "sa8255p-pmics.dtsi"
> +#include "sa8255p-scmi.dtsi"
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. SA8255P Ride";
> + compatible = "qcom,sa8255p-ride", "qcom,sa8255p";
> +
> + aliases {
> + i2c11 = &i2c11;
> + i2c18 = &i2c18;
> + serial0 = &uart10;
> + serial1 = &uart4;
> + spi16 = &spi16;
> + scmichannels = &scmichannels;

Nothing parses this.



> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +&firmware {
> + scmi0: scmi0 {

scmi-0


> + compatible = "qcom,scmi-smc";
> + arm,smc-id = <0xc6008012>;
> + shmem = <&shmem0>;
> +
> + interrupts = <GIC_SPI 963 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "a2p";
> +
> + max-rx-timeout-ms = <3000>;
> +
> + status = "disabled";

status is the last property (from properties)


...

> +
> +&soc {
> + scmichannels: sram@d0000000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "mmio-sram";
> + reg = <0x0 0xd0000000 0x0 0x40000>;
> + ranges = <0x0 0x0 0x0 0xffffffff>;
> +
> + shmem0: scmi-sram@d0000000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0000000 0x1000>;
> + };
> +
> + shmem1: scmi-sram@d0001000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0001000 0x1000>;
> + };
> +
> + shmem2: scmi-sram@d0002000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0002000 0x1000>;
> + };
> +
> + shmem3: scmi-sram@d0003000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0003000 0x1000>;
> + };
> +
> + shmem4: scmi-sram@d0004000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0004000 0x1000>;
> + };
> +
> + shmem5: scmi-sram@d0005000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0005000 0x1000>;
> + };
> +
> + shmem6: scmi-sram@d0006000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0006000 0x1000>;
> + };
> +
> + shmem7: scmi-sram@d0007000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0007000 0x1000>;
> + };
> +
> + shmem8: scmi-sram@d0008000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0008000 0x1000>;
> + };
> +
> + shmem9: scmi-sram@d0009000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0009000 0x1000>;
> + };
> +
> + shmem10: scmi-sram@d000a000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd000a000 0x1000>;
> + };
> +
> + shmem11: scmi-sram@d000b000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd000b000 0x1000>;
> + };
> +
> + shmem12: scmi-sram@d000c000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd000c000 0x1000>;
> + };
> +
> + shmem13: scmi-sram@d000d000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd000d000 0x1000>;
> + };
> +
> + shmem14: scmi-sram@d000e000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd000e000 0x1000>;
> + };
> +
> + shmem15: scmi-sram@d000f000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd000f000 0x1000>;
> + };
> +
> + shmem16: scmi-sram@d0010000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0010000 0x1000>;
> + };
> +
> + shmem17: scmi-sram@d0011000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0011000 0x1000>;
> + };
> +
> + shmem18: scmi-sram@d0012000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0012000 0x1000>;
> + };
> +
> + shmem19: scmi-sram@d0013000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0013000 0x1000>;
> + };
> +
> + shmem20: scmi-sram@d0014000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0014000 0x1000>;
> + };
> +
> + shmem21: scmi-sram@d0015000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0015000 0x1000>;
> + };
> +
> + shmem22: scmi-sram@d0016000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0016000 0x1000>;
> + };
> +
> + shmem23: scmi-sram@d0017000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0017000 0x1000>;
> + };
> +
> + shmem24: scmi-sram@d0018000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0018000 0x1000>;
> + };
> +
> + shmem25: scmi-sram@d0019000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0019000 0x1000>;
> + };
> +
> + shmem26: scmi-sram@d001a000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd001a000 0x1000>;
> + };
> +
> + shmem27: scmi-sram@d001b000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd001b000 0x1000>;
> + };
> +
> + shmem28: scmi-sram@d001c000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd001c000 0x1000>;
> + };
> +
> + shmem29: scmi-sram@d001d000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd001d000 0x1000>;
> + };
> +
> + shmem30: scmi-sram@d001e000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd001e000 0x1000>;
> + };
> +
> + shmem31: scmi-sram@d001f000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd001f000 0x1000>;
> + };
> +
> + shmem32: scmi-sram@d0020000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0020000 0x1000>;
> + };
> +
> + shmem33: scmi-sram@d0021000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0021000 0x1000>;
> + };
> +
> + shmem34: scmi-sram@d0022000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0022000 0x1000>;
> + };
> +
> + shmem35: scmi-sram@d0023000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0023000 0x1000>;
> + };
> +
> + shmem36: scmi-sram@d0024000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0024000 0x1000>;
> + };
> +
> + shmem37: scmi-sram@d0025000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0025000 0x1000>;
> + };
> +
> + shmem38: scmi-sram@d0026000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0026000 0x1000>;
> + };
> +
> + shmem39: scmi-sram@d0027000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0027000 0x1000>;
> + };
> +
> + shmem40: scmi-sram@d0028000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0028000 0x1000>;
> + };
> +
> + shmem41: scmi-sram@d0029000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0029000 0x1000>;
> + };
> +
> + shmem42: scmi-sram@d002a000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd002a000 0x1000>;
> + };
> +
> + shmem43: scmi-sram@d002b000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd002b000 0x1000>;
> + };
> +
> + shmem44: scmi-sram@d002c000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd002c000 0x1000>;
> + };
> +
> + shmem45: scmi-sram@d002d000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd002d000 0x1000>;
> + };
> +
> + shmem46: scmi-sram@d002e000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd002e000 0x1000>;
> + };
> +
> + shmem47: scmi-sram@d002f000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd002f000 0x1000>;
> + };
> +
> + shmem48: scmi-sram@d0030000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0030000 0x1000>;
> + };
> +
> + shmem49: scmi-sram@d0031000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0031000 0x1000>;
> + };
> +
> + shmem50: scmi-sram@d0032000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0032000 0x1000>;
> + };
> +
> + shmem51: scmi-sram@d0033000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0033000 0x1000>;
> + };
> +
> + shmem52: scmi-sram@d0034000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0034000 0x1000>;
> + };
> +
> + shmem53: scmi-sram@d0035000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0035000 0x1000>;
> + };
> +
> + shmem54: scmi-sram@d0036000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0036000 0x1000>;
> + };
> +
> + shmem55: scmi-sram@d0037000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0037000 0x1000>;
> + };
> +
> + shmem56: scmi-sram@d0038000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0038000 0x1000>;
> + };
> +
> + shmem57: scmi-sram@d0039000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd0039000 0x1000>;
> + };
> +
> + shmem58: scmi-sram@d003a000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd003a000 0x1000>;
> + };
> +
> + shmem59: scmi-sram@d003b000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd003b000 0x1000>;
> + };
> +
> + shmem60: scmi-sram@d003c000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd003c000 0x1000>;
> + };
> +
> + shmem61: scmi-sram@d003d000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd003d000 0x1000>;
> + };
> +
> + shmem62: scmi-sram@d003e000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd003e000 0x1000>;
> + };
> +
> + shmem63: scmi-sram@d003f000 {
> + compatible = "arm,scmi-shmem";
> + reg = <0xd003f000 0x1000>;
> + };
> + };
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sa8255p.dtsi b/arch/arm64/boot/dts/qcom/sa8255p.dtsi
> new file mode 100644
> index 000000000000..c354f76ffa5e
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sa8255p.dtsi
> @@ -0,0 +1,2405 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/mailbox/qcom-ipcc.h>
> +
> +/ {
> + interrupt-parent = <&intc>;
> +
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + clocks {
> + xo_board_clk: xo-board-clk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + };
> +
> + sleep_clk: sleep-clk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + };
> +
> + gpll0_board_clk: gpll0-board-clk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + };
> +
> + bi_tcxo_div2: bi-tcxo-div2-clk {
> + compatible = "fixed-factor-clock";
> + clocks = <&xo_board_clk>;
> + clock-mult = <1>;
> + clock-div = <2>;
> + #clock-cells = <0>;
> + };
> + };
> +
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + CPU0: cpu@0 {

Lowercase label.

...

Best regards,
Krzysztof