[PATCH] cpufreq: ti-cpufreq: Use socinfo to get revision in AM62 family
From: Dhruva Gole
Date: Mon Sep 02 2024 - 05:22:42 EST
In the AM62x, AM62Ax, and AM62Px devices, we already have the revision
info within the k3-socinfo driver. Hence, re-use this information from
there instead of re using the offset for 2 drivers trying to get the
same information ie. revision.
Signed-off-by: Dhruva Gole <d-gole@xxxxxx>
---
Hi,
This patch depends on [1] and if someone wants to test, can use my
github branch [2]. I was able to test this on SK-AM625 [3].
[1] https://lore.kernel.org/linux-arm-kernel/20240828131915.3198081-1-nm@xxxxxx/
[2] https://github.com/DhruvaG2000/v-linux/tree/ti-cpufreq-revision-fix
[3] https://gist.github.com/DhruvaG2000/d0c360b0bd7e43d0fd28cfe3eab941d2
Cc: Nishanth Menon <nm@xxxxxx>
Cc: Vignesh Raghavendra <vigneshr@xxxxxx>
Cc: Vibhore Vardhan <vibhore@xxxxxx>
Cc: Bryan Brattlof <bb@xxxxxx>
---
drivers/cpufreq/ti-cpufreq.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
index 804329e81eb8..ba621ce1cdda 100644
--- a/drivers/cpufreq/ti-cpufreq.c
+++ b/drivers/cpufreq/ti-cpufreq.c
@@ -16,6 +16,7 @@
#include <linux/pm_opp.h>
#include <linux/regmap.h>
#include <linux/slab.h>
+#include <linux/sys_soc.h>
#define REVISION_MASK 0xF
#define REVISION_SHIFT 28
@@ -303,6 +304,13 @@ static struct ti_cpufreq_soc_data am3517_soc_data = {
.quirks = TI_QUIRK_SYSCON_MAY_BE_MISSING,
};
+static const struct soc_device_attribute k3_cpufreq_soc[] = {
+ { .family = "AM62X", .revision = "SR1.0" },
+ { .family = "AM62AX", .revision = "SR1.0" },
+ { .family = "AM62PX", .revision = "SR1.0" },
+ { /* sentinel */ }
+};
+
static struct ti_cpufreq_soc_data am625_soc_data = {
.efuse_xlate = am625_efuse_xlate,
.efuse_offset = 0x0018,
@@ -384,6 +392,16 @@ static int ti_cpufreq_get_rev(struct ti_cpufreq_data *opp_data,
struct device *dev = opp_data->cpu_dev;
u32 revision;
int ret;
+ if (soc_device_match(k3_cpufreq_soc)) {
+ /*
+ * Since the SR is 1.0, hard code the revision_value as
+ * 0x1 here. This way we avoid re using the same register
+ * that is giving us required information inside socinfo
+ * anyway.
+ */
+ *revision_value = 0x1;
+ goto done;
+ }
ret = regmap_read(opp_data->syscon, opp_data->soc_data->rev_offset,
&revision);
@@ -406,6 +424,7 @@ static int ti_cpufreq_get_rev(struct ti_cpufreq_data *opp_data,
*revision_value = BIT((revision >> REVISION_SHIFT) & REVISION_MASK);
+done:
return 0;
}
base-commit: ecc768a84f0b8e631986f9ade3118fa37852fef0
--
2.34.1