Re: [PATCH 1/3] dt-bindings: PCI: hisilicon,kirin-pcie: add top-level constraints

[Krzysztof Wilczyński]

Hello,

> Properties with variable number of items per each device are expected to
> have widest constraints in top-level "properties:" block and further
> customized (narrowed) in "if:then:".  Add missing top-level constraints
> for clock-names and reset-names.

Applied to dt-bindings, thank you!

[01/03] dt-bindings: PCI: hisilicon,kirin-pcie: Add top-level constraints
        https://git.kernel.org/pci/pci/c/ac44be2155cd

[02/03] dt-bindings: PCI: renesas,pci-rcar-gen2: Add top-level constraints
        https://git.kernel.org/pci/pci/c/c62a0b8fe8bf

[03/03] dt-bindings: PCI: socionext,uniphier-pcie-ep: Add top-level constraints
        https://git.kernel.org/pci/pci/c/a5c1bf7e9a46

	Krzysztof