Re: [PATCH net-next v8 5/7] net: stmmac: support fp parameter of tc-mqprio
From: Vladimir Oltean
Date: Thu Sep 05 2024 - 10:02:50 EST
On Thu, Sep 05, 2024 at 03:02:26PM +0800, Furong Xu wrote:
> tc-mqprio can select whether traffic classes are express or preemptible.
>
> After some traffic tests, MAC merge layer statistics are all good.
>
> Local device:
> ethtool --include-statistics --json --show-mm eth1
> [ {
> "ifname": "eth1",
> "pmac-enabled": true,
> "tx-enabled": true,
> "tx-active": true,
> "tx-min-frag-size": 60,
> "rx-min-frag-size": 60,
> "verify-enabled": true,
> "verify-time": 100,
> "max-verify-time": 128,
> "verify-status": "SUCCEEDED",
> "statistics": {
> "MACMergeFrameAssErrorCount": 0,
> "MACMergeFrameSmdErrorCount": 0,
> "MACMergeFrameAssOkCount": 0,
> "MACMergeFragCountRx": 0,
> "MACMergeFragCountTx": 35105,
> "MACMergeHoldCount": 0
> }
> } ]
>
> Remote device:
> ethtool --include-statistics --json --show-mm end1
> [ {
> "ifname": "end1",
> "pmac-enabled": true,
> "tx-enabled": true,
> "tx-active": true,
> "tx-min-frag-size": 60,
> "rx-min-frag-size": 60,
> "verify-enabled": true,
> "verify-time": 100,
> "max-verify-time": 128,
> "verify-status": "SUCCEEDED",
> "statistics": {
> "MACMergeFrameAssErrorCount": 0,
> "MACMergeFrameSmdErrorCount": 0,
> "MACMergeFrameAssOkCount": 35105,
> "MACMergeFragCountRx": 35105,
> "MACMergeFragCountTx": 0,
> "MACMergeHoldCount": 0
> }
> } ]
>
> Tested on DWMAC CORE 5.10a
>
> Signed-off-by: Furong Xu <0x1207@xxxxxxxxx>
> ---
> +int dwmac5_fpe_map_preemption_class(struct net_device *ndev,
> + struct netlink_ext_ack *extack, u32 pclass)
> +{
> + u32 offset, count, val, preemptible_txqs = 0;
> + struct stmmac_priv *priv = netdev_priv(ndev);
> + u32 num_tc = ndev->num_tc;
> +
> + if (!pclass)
> + goto update_mapping;
> +
> + /* DWMAC CORE4+ can not program TC:TXQ mapping to hardware.
> + *
> + * Synopsys Databook:
> + * "The number of Tx DMA channels is equal to the number of Tx queues,
> + * and is direct one-to-one mapping."
> + */
> + for (u32 tc = 0; tc < num_tc; tc++) {
> + count = ndev->tc_to_txq[tc].count;
> + offset = ndev->tc_to_txq[tc].offset;
> +
> + if (pclass & BIT(tc))
> + preemptible_txqs |= GENMASK(offset + count - 1, offset);
> +
> + /* This is 1:1 mapping, go to next TC */
> + if (count == 1)
> + continue;
> +
> + if (priv->plat->tx_sched_algorithm == MTL_TX_ALGORITHM_SP) {
> + NL_SET_ERR_MSG_MOD(extack, ALG_ERR_MSG);
> + return -EINVAL;
> + }
> +
> + u32 queue_weight = priv->plat->tx_queues_cfg[offset].weight;
Please do not put variable declarations in the middle of the scope.
Declare "u32 queue_weight" separately and just keep the assignment here.
> +
> + for (u32 i = 1; i < count; i++) {
> + if (priv->plat->tx_queues_cfg[offset + i].weight !=
> + queue_weight) {
> + NL_SET_ERR_MSG_FMT_MOD(extack, WEIGHT_ERR_MSG,
> + queue_weight, tc);
> + return -EINVAL;
> + }
> + }
> + }
> +
> +update_mapping:
> + val = readl(priv->ioaddr + MTL_FPE_CTRL_STS);
> + writel(u32_replace_bits(val, preemptible_txqs, DWMAC5_PREEMPTION_CLASS),
> + priv->ioaddr + MTL_FPE_CTRL_STS);
> +
> + return 0;
> +}
Otherwise:
Reviewed-by: Vladimir Oltean <olteanv@xxxxxxxxx>