[PATCH 2/2] mips: dts: realtek: Add syscon-reboot node

From: Chris Packham
Date: Sun Sep 08 2024 - 21:47:31 EST


The board level reset on systems using the RTL9302 can be driven via the
switch. Use a syscon-reboot node to represent this.

Signed-off-by: Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx>
---
.../dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts | 3 +++
arch/mips/boot/dts/realtek/rtl930x.dtsi | 11 +++++++++++
2 files changed, 14 insertions(+)

diff --git a/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts b/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts
index 77d2566545f2..a517135446a3 100644
--- a/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts
+++ b/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts
@@ -71,3 +71,6 @@ partition@1180000 {
};
};
};
+&switch0 {
+ status = "okay";
+};
diff --git a/arch/mips/boot/dts/realtek/rtl930x.dtsi b/arch/mips/boot/dts/realtek/rtl930x.dtsi
index f271940f82be..cf1b38b6c353 100644
--- a/arch/mips/boot/dts/realtek/rtl930x.dtsi
+++ b/arch/mips/boot/dts/realtek/rtl930x.dtsi
@@ -29,6 +29,17 @@ lx_clk: clock-175mhz {
#clock-cells = <0>;
clock-frequency = <175000000>;
};
+
+ switch0: switch@1b000000 {
+ compatible = "realtek,rtl9302c-switch", "syscon", "simple-mfd";
+ reg = <0x1b000000 0x10000>;
+
+ reboot {
+ compatible = "syscon-reboot";
+ offset = <0x0c>;
+ value = <0x01>;
+ };
+ };
};

&soc {
--
2.46.0