[PATCH v2 0/3] x86/mce: Add Zhaoxin MCE support

From: Tony W Wang-oc
Date: Tue Sep 10 2024 - 05:31:44 EST


From: Lyle Li <LyleLi@xxxxxxxxxxx>

Zhaoxin consists of two vendors, X86_VENDOR_ZHAOXIN and
X86_VENDOR_CENTAUR, so add the centaur vendor to support
Zhaoxin MCA in mce/core.c and mce/intel.c.

For the sake of code standardization, add zhaoxin.c to
override the Zhaoxin MCA code.

Zhaoxin CPUs support CMCI compatible with Intel, because
Zhaoxin's UCR error is not reported through CMCI, and in
order to be compatible with intel's CMCI code, so add Zhaoxin
CMCI storm toggle to support the new CMCI storm switching
in mce/intel.c, mce/zhaoxin.c, mce/threshold.c, and mce/internal.h.

v1->v2:
- Fix multiple definition of "mce_zhaoxin_feature_init" (patch 2/3)
- Fix multiple definition of "mce_zhaoxin_feature_clear" (patch 2/3)
- Fix multiple definition of "mce_zhaoxin_handle_storm" (patch 3/3)

Lyle Li (3):
x86/mce: Add centaur vendor to support Zhaoxin MCA
x86/mce: Add zhaoxin.c to support Zhaoxin MCA
x86/mce: Add CMCI storm switching support for Zhaoxin

arch/x86/Kconfig | 8 ++++
arch/x86/kernel/cpu/mce/Makefile | 2 +-
arch/x86/kernel/cpu/mce/core.c | 70 +++++++++--------------------
arch/x86/kernel/cpu/mce/intel.c | 8 ++--
arch/x86/kernel/cpu/mce/internal.h | 14 +++++-
arch/x86/kernel/cpu/mce/threshold.c | 4 ++
arch/x86/kernel/cpu/mce/zhaoxin.c | 53 ++++++++++++++++++++++
7 files changed, 104 insertions(+), 55 deletions(-)
create mode 100644 arch/x86/kernel/cpu/mce/zhaoxin.c

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2.34.1