Re: [PATCH 0/2] riscv: Fix race conditions in PR_RISCV_SET_ICACHE_FLUSH_CTX

[Palmer Dabbelt]

On Wed, 11 Sep 2024 08:30:32 PDT (-0700), patchwork-bot+linux-riscv@xxxxxxxxxx wrote:
> Hello:
>
> This series was applied to riscv/linux.git (fixes)
> by Palmer Dabbelt <palmer@xxxxxxxxxxxx>:
>
> On Tue, 13 Aug 2024 16:02:16 -0700 you wrote:
> > There are two race conditions possible with
> > PR_RISCV_SET_ICACHE_FLUSH_CTX. The first one can be seen by enabling
> > DEBUG_PREEMPT and using this prctl which will warn with BUG: using
> > smp_processor_id() in preemptible. This can be fixed by disabling
> > preemption during this prctl handling. Another race condition is present
> > when the mm->context.icache_stale_mask is changed by a thread while a
> > different thread in the same mm context is between switch_mm() and
> > switch_to() during a context switch.
> >
> > [...]
>
> Here is the summary with links:
>   - [1/2] riscv: Disable preemption while handling PR_RISCV_CTX_SW_FENCEI_OFF
>     https://git.kernel.org/riscv/c/7c1e5b9690b0
>   - [2/2] riscv: Eagerly flush in flush_icache_deferred()
>     (no matching commit)
>
> You are awesome, thank you!

I think the bot just got a little lost here, I applied the v2 from over 
here: https://lore.kernel.org/r/20240903-fix_fencei_optimization-v2-1-8025f20171fc@xxxxxxxxxxxx