Re: [PATCH] net: sparx5: Fix invalid timestamps
From: Daniel Machon
Date: Sat Sep 14 2024 - 15:04:00 EST
> Bit 270-271 are occasionally unexpectedly set by the hardware.
>
> This issue was observed with 10G SFPs causing huge time errors (> 30ms) in PTP.
>
> Only 30 bits are needed for the nanosecond part of the timestamp, clear 2 most significant bits before extracting timestamp from the internal frame header.
>
> Signed-off-by: Aakash Menon <aakash.menon@xxxxxxxxxxxxx>
> ---
> drivers/net/ethernet/microchip/sparx5/sparx5_packet.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c b/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c
> index f3f5fb420468..a05263488851 100644
> --- a/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c
> +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c
> @@ -45,8 +45,12 @@ void sparx5_ifh_parse(u32 *ifh, struct frame_info *info)
> fwd = (fwd >> 5);
> info->src_port = FIELD_GET(GENMASK(7, 1), fwd);
>
> + /*
> + * Bit 270-271 are occasionally unexpectedly set by the hardware,
> + * clear bits before extracting timestamp
> + */
> info->timestamp =
> - ((u64)xtr_hdr[2] << 24) |
> + ((u64)(xtr_hdr[2] & 0x3F) << 24) |
> ((u64)xtr_hdr[3] << 16) |
> ((u64)xtr_hdr[4] << 8) |
> ((u64)xtr_hdr[5] << 0);
> --
> 2.46.0
>
Hi Aakash,
I will (or somebody else) try to reproduce and test this at the
beginning of the next week.
Meanwhile, you can address the issues that Simon mentioned.
Thanks.
/Daniel