Re: [RESEND PATCH 3/3] riscv: dts: canaan: Add k230's pinctrl node

[Ze Huang]

On 9/16/24 11:52 PM, Krzysztof Kozlowski wrote:
> On 16/09/2024 08:47, Ze Huang wrote:
> > Add pinctrl device, containing default config for uart, pwm, iis, iic and
> > mmc.
> >
> > Signed-off-by: Ze Huang <18771902331@xxxxxxx>
> > ---
> >   arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi | 316 +++++++++++++++++++
> >   arch/riscv/boot/dts/canaan/k230-pinctrl.h    |  18 ++
> >   arch/riscv/boot/dts/canaan/k230.dtsi         |   2 +
> >   3 files changed, 336 insertions(+)
> >   create mode 100644 arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi
> >   create mode 100644 arch/riscv/boot/dts/canaan/k230-pinctrl.h
> >
> > diff --git a/arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi b/arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi
> > new file mode 100644
> > index 000000000000..0737f50d2868
> > --- /dev/null
> > +++ b/arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi
> > @@ -0,0 +1,316 @@
> > +// SPDX-License-Identifier: GPL-2.0 OR MIT
> > +/*
> > + * Copyright (C) 2024 Ze Huang <18771902331@xxxxxxx>
> > + */
> > +#include "k230-pinctrl.h"
> > +
> > +/ {
> > +	soc {
> > +		pinctrl: pinctrl@91105000 {
> That's odd style - defining SoC nodes outside of SoC DTSI. Are you sure
> that's preferred coding style in RISC-V or Canaan?

Pinctrl-related nodes were separated the for ease of maintenance, but the
convention in Canaan is to place them in the board-level DTS file. Would it
be better to stay consistent with their approach?

> > +			compatible = "canaan,k230-pinctrl";
> > +			reg = <0x0 0x91105000 0x0 0x100>;
> > +
> Best regards,
> Krzysztof