Re: [PATCH 2/3] mailbox: qcom-cpucp-mbox: Add support for SC7280 CPUCP mailbox controller
From: kernel test robot
Date: Tue Sep 24 2024 - 11:27:38 EST
Hi Shivnandan,
kernel test robot noticed the following build warnings:
[auto build test WARNING on robh/for-next]
[also build test WARNING on linus/master v6.11 next-20240924]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Shivnandan-Kumar/dt-bindings-mailbox-qcom-cpucp-mbox-Add-sc7280-cpucp-mailbox-instance/20240924-133657
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link: https://lore.kernel.org/r/20240924050941.1251485-3-quic_kshivnan%40quicinc.com
patch subject: [PATCH 2/3] mailbox: qcom-cpucp-mbox: Add support for SC7280 CPUCP mailbox controller
config: alpha-allyesconfig (https://download.01.org/0day-ci/archive/20240924/202409242349.yXq4CDaH-lkp@xxxxxxxxx/config)
compiler: alpha-linux-gcc (GCC) 13.3.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240924/202409242349.yXq4CDaH-lkp@xxxxxxxxx/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Closes: https://lore.kernel.org/oe-kbuild-all/202409242349.yXq4CDaH-lkp@xxxxxxxxx/
All warnings (new ones prefixed by >>):
>> drivers/mailbox/qcom-cpucp-mbox.c:48: warning: Function parameter or struct member 'desc' not described in 'qcom_cpucp_mbox'
vim +48 drivers/mailbox/qcom-cpucp-mbox.c
0e2a9a03106cd5 Sibi Sankar 2024-06-12 34
0e2a9a03106cd5 Sibi Sankar 2024-06-12 35 /**
0e2a9a03106cd5 Sibi Sankar 2024-06-12 36 * struct qcom_cpucp_mbox - Holder for the mailbox driver
0e2a9a03106cd5 Sibi Sankar 2024-06-12 37 * @chans: The mailbox channel
0e2a9a03106cd5 Sibi Sankar 2024-06-12 38 * @mbox: The mailbox controller
0e2a9a03106cd5 Sibi Sankar 2024-06-12 39 * @tx_base: Base address of the CPUCP tx registers
0e2a9a03106cd5 Sibi Sankar 2024-06-12 40 * @rx_base: Base address of the CPUCP rx registers
0e2a9a03106cd5 Sibi Sankar 2024-06-12 41 */
0e2a9a03106cd5 Sibi Sankar 2024-06-12 42 struct qcom_cpucp_mbox {
0e2a9a03106cd5 Sibi Sankar 2024-06-12 43 struct mbox_chan chans[APSS_CPUCP_IPC_CHAN_SUPPORTED];
654ed3904f995a Shivnandan Kumar 2024-09-24 44 const struct qcom_cpucp_mbox_desc *desc;
0e2a9a03106cd5 Sibi Sankar 2024-06-12 45 struct mbox_controller mbox;
0e2a9a03106cd5 Sibi Sankar 2024-06-12 46 void __iomem *tx_base;
0e2a9a03106cd5 Sibi Sankar 2024-06-12 47 void __iomem *rx_base;
0e2a9a03106cd5 Sibi Sankar 2024-06-12 @48 };
0e2a9a03106cd5 Sibi Sankar 2024-06-12 49
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