Re: [PATCH] x86,cpu: add X86_FEATURE_INVLPGB flag

[Xin Li]

On 9/24/2024 3:00 PM, Rik van Riel wrote:
> Add the definition for the X86_FEATURE_INVLPGB CPUID flag.
>
> Tested by booting a kernel with this change on an AMD Milan system,
> and making sure the "invlpgb" flag shows up in /proc/cpuinfo
>
> Signed-off-by: Rik van Riel <riel@xxxxxxxxxxx>

Now there is a need to also update the CPUID database:

https://lore.kernel.org/lkml/87o7642u7w.ffs@tglx/

Thanks!
    Xin

> ---
>   arch/x86/include/asm/cpufeatures.h | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index dd4682857c12..9a98cc7ded39 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -335,6 +335,7 @@
>   #define X86_FEATURE_CLZERO		(13*32+ 0) /* "clzero" CLZERO instruction */
>   #define X86_FEATURE_IRPERF		(13*32+ 1) /* "irperf" Instructions Retired Count */
>   #define X86_FEATURE_XSAVEERPTR		(13*32+ 2) /* "xsaveerptr" Always save/restore FP error pointers */
> +#define X86_FEATURE_INVLPGB		(13*32+ 3) /* "invlpgb" INVLPGB instruction */
>   #define X86_FEATURE_RDPRU		(13*32+ 4) /* "rdpru" Read processor register at user level */
>   #define X86_FEATURE_WBNOINVD		(13*32+ 9) /* "wbnoinvd" WBNOINVD instruction */
>   #define X86_FEATURE_AMD_IBPB		(13*32+12) /* Indirect Branch Prediction Barrier */