Re: [PATCH v3 1/2] dt-bindings: i2c: snps,designware-i2c: declare bus capacitance and clk freq optimized

[Krzysztof Kozlowski]

On Tue, Oct 01, 2024 at 04:29:33PM +0800, Michael Wu wrote:
> Since there are no registers controlling the hardware parameters
> IC_CAP_LOADING and IC_CLK_FREQ_OPTIMIZATION, their values can only be
> declared in the device tree.
> 
> snps,bus-capacitance-pf indicates the bus capacitance in picofarads (pF).
> It affects the high and low pulse width of SCL line in high speed mode.
> The legal values for this property are 100 and 400 only, and default
> value is 100. This property corresponds to IC_CAP_LOADING.
> 
> snps,clk-freq-optimized indicates whether the hardware input clock
> frequency is reduced by reducing the internal latency. This property
> corresponds to IC_CLK_FREQ_OPTIMIZATION.
> 
> The driver can calculate hs_hcnt and hs_lcnt appropriate for the hardware
> based on these two properties.
> 
> Signed-off-by: Michael Wu <michael.wu@xxxxxxxxx>
> ---
>  .../bindings/i2c/snps,designware-i2c.yaml     | 24 +++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
> index 60035a787e5c..c373f3acd34b 100644
> --- a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
> +++ b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
> @@ -97,6 +97,21 @@ properties:
>        - const: tx
>        - const: rx
>  
> +  snps,bus-capacitance-pf:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description: >

I asked to drop |, so you replaced it with something else? So drop >...
and then you are going to replace it with another one?

That's not a cat and mouse.

> +      This property indicates the bus capacitance in picofarads (pF).
> +      This value is used to compute the tHIGH and tLOW periods for high speed
> +      mode.
> +    default: 100

I asked for some constraints here. min/maximum. I think you never
replied to this.

> +
> +  snps,clk-freq-optimized:
> +    description: >
> +      This property indicates whether the hardware input clock frequency is
> +      reduced by reducing the internal latency. This value is used to compute
> +      the tHIGH and tLOW periods for high speed mode.
> +    type: boolean
> +
>  unevaluatedProperties: false
>  
>  required:
> @@ -146,4 +161,13 @@ examples:
>        interrupts = <8>;
>        clocks = <&ahb_clk>;
>      };
> +  - |
> +    i2c@c5000000 {
> +      compatible = "snps,designware-i2c";

Extend EXISTING example. Not add new example.

Best regards,
Krzysztof