Re: [PATCH 4/8] clk: rockchip: Add PLL flag ROCKCHIP_PLL_FIXED_MODE

[Heiko Stübner]

Am Mittwoch, 2. Oktober 2024, 12:08:20 CEST schrieb Yao Zi:
> On Wed, Oct 02, 2024 at 10:16:49AM +0200, Heiko Stübner wrote:
> > Hi,
> > 
> > Am Dienstag, 1. Oktober 2024, 06:23:58 CEST schrieb Yao Zi:
> > > RK3528 comes with a new PLL type, flagged by ROCKCHIP_PLL_FIXED_MODE,
> > > which should operate in normal mode only. Add corresponding definition
> > > and handle it in code.
> > > 
> > 
> > More commit message would be nice ;-) .
> 
> Good idea.
> 
> > It's the PPLL for the pcie controller that is specified in the manual to
> > only work in normal mode. This is helpful for people reading along :-) .
> > 
> > Heiko
> 
> btw, for the documentation, is there any technical reference manual
> of RK3528 available publicly? Please let me know if it's true, it will
> be quite helpful to understand clock tree better :)

Sadly not. So far there hasn't been a "leak" yet and Rockchip also seems
to have gotten more restrictive for whatever strange reason, so with my
NDA I also only got part1 of the manual.


Heiko