get_div() may return zero, so it is necessary to check
before calling DIV_ROUND_UP_ULL().
Return value of get_div() depends on reg1, reg2, shift1, shift2
fields of clk_double_div structure which are filled using the
PERIPH_DOUBLEDIV macro. This macro is called from the
PERIPH_CLK_FULL_DD and PERIPH_CLK_MUX_DD macros (the last 4 arguments).
It is not known exactly what values can be contained in the registers
at the addresses DIV_SEL0, DIV_SEL1, DIV_SEL2, so the final value of
div can be zero. Print an error message and return 0 in this case.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Fixes: 8ca4746a78ab ("clk: mvebu: Add the peripheral clock driver for Armada 3700")
Signed-off-by: Alexandra Diupina <adiupina@xxxxxxxxxxxxx>
---
v4: replace hw->init->name with clk_hw_get_name(hw)
v3: fix indentation
v2: added explanations to the commit message and printing
of an error message when div==0
drivers/clk/mvebu/armada-37xx-periph.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/mvebu/armada-37xx-periph.c b/drivers/clk/mvebu/armada-37xx-periph.c
index 13906e31bef8..2f0145a76f22 100644
--- a/drivers/clk/mvebu/armada-37xx-periph.c
+++ b/drivers/clk/mvebu/armada-37xx-periph.c
@@ -343,7 +343,12 @@ static unsigned long clk_double_div_recalc_rate(struct clk_hw *hw,
div = get_div(double_div->reg1, double_div->shift1);
div *= get_div(double_div->reg2, double_div->shift2);
- return DIV_ROUND_UP_ULL((u64)parent_rate, div);
+ if (!div) {
+ pr_err("Can't recalculate the rate of clock %s\n", clk_hw_get_name(hw));
+ return 0;
+ } else {
+ return DIV_ROUND_UP_ULL((u64)parent_rate, div);
+ }
}
static const struct clk_ops clk_double_div_ops = {