drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c:134 core_dcn4_initialize() warn: inconsistent indenting
From: kernel test robot
Date: Fri Oct 04 2024 - 20:52:56 EST
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: ac308609567d31fe44be80ab757a5ddf062362ef
commit: 00c391102abc13763e2bfc90e05503109b19f074 drm/amd/display: Add misc DC changes for DCN401
date: 5 months ago
config: loongarch-randconfig-r071-20241003 (https://download.01.org/0day-ci/archive/20241005/202410050813.ukNdcvDS-lkp@xxxxxxxxx/config)
compiler: loongarch64-linux-gcc (GCC) 14.1.0
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Closes: https://lore.kernel.org/oe-kbuild-all/202410050813.ukNdcvDS-lkp@xxxxxxxxx/
New smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c:134 core_dcn4_initialize() warn: inconsistent indenting
Old smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c:553 core_dcn4_mode_programming() warn: inconsistent indenting
drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c:568 core_dcn4_mode_programming() warn: curly braces intended?
vim +134 drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c
70839da6360500 Aurabindo Pillai 2024-04-19 112
70839da6360500 Aurabindo Pillai 2024-04-19 113 bool core_dcn4_initialize(struct dml2_core_initialize_in_out *in_out)
70839da6360500 Aurabindo Pillai 2024-04-19 114 {
70839da6360500 Aurabindo Pillai 2024-04-19 115 struct dml2_core_instance *core = in_out->instance;
70839da6360500 Aurabindo Pillai 2024-04-19 116
70839da6360500 Aurabindo Pillai 2024-04-19 117 if (!in_out->minimum_clock_table)
70839da6360500 Aurabindo Pillai 2024-04-19 118 return false;
70839da6360500 Aurabindo Pillai 2024-04-19 119 else
70839da6360500 Aurabindo Pillai 2024-04-19 120 core->minimum_clock_table = in_out->minimum_clock_table;
70839da6360500 Aurabindo Pillai 2024-04-19 121
70839da6360500 Aurabindo Pillai 2024-04-19 122 if (in_out->explicit_ip_bb && in_out->explicit_ip_bb_size > 0) {
70839da6360500 Aurabindo Pillai 2024-04-19 123 memcpy(&core->clean_me_up.mode_lib.ip, in_out->explicit_ip_bb, in_out->explicit_ip_bb_size);
70839da6360500 Aurabindo Pillai 2024-04-19 124
70839da6360500 Aurabindo Pillai 2024-04-19 125 // FIXME_STAGE2:
70839da6360500 Aurabindo Pillai 2024-04-19 126 // DV still uses stage1 ip_param_st for each variant, need to patch the ip_caps with ip_param info
70839da6360500 Aurabindo Pillai 2024-04-19 127 // Should move DV to use ip_caps but need move more overrides to ip_caps
70839da6360500 Aurabindo Pillai 2024-04-19 128 patch_ip_caps_with_explicit_ip_params(in_out->ip_caps, in_out->explicit_ip_bb);
70839da6360500 Aurabindo Pillai 2024-04-19 129 core->clean_me_up.mode_lib.ip.subvp_pstate_allow_width_us = core_dcn4_ip_caps_base.subvp_pstate_allow_width_us;
70839da6360500 Aurabindo Pillai 2024-04-19 130 core->clean_me_up.mode_lib.ip.subvp_fw_processing_delay_us = core_dcn4_ip_caps_base.subvp_pstate_allow_width_us;
70839da6360500 Aurabindo Pillai 2024-04-19 131 core->clean_me_up.mode_lib.ip.subvp_swath_height_margin_lines = core_dcn4_ip_caps_base.subvp_swath_height_margin_lines;
70839da6360500 Aurabindo Pillai 2024-04-19 132 } else {
70839da6360500 Aurabindo Pillai 2024-04-19 133 memcpy(&core->clean_me_up.mode_lib.ip, &core_dcn4_ip_caps_base, sizeof(struct dml2_core_ip_params));
70839da6360500 Aurabindo Pillai 2024-04-19 @134 patch_ip_params_with_ip_caps(&core->clean_me_up.mode_lib.ip, in_out->ip_caps);
70839da6360500 Aurabindo Pillai 2024-04-19 135
70839da6360500 Aurabindo Pillai 2024-04-19 136 core->clean_me_up.mode_lib.ip.imall_supported = false;
70839da6360500 Aurabindo Pillai 2024-04-19 137 }
70839da6360500 Aurabindo Pillai 2024-04-19 138
70839da6360500 Aurabindo Pillai 2024-04-19 139 memcpy(&core->clean_me_up.mode_lib.soc, in_out->soc_bb, sizeof(struct dml2_soc_bb));
70839da6360500 Aurabindo Pillai 2024-04-19 140
70839da6360500 Aurabindo Pillai 2024-04-19 141 return true;
70839da6360500 Aurabindo Pillai 2024-04-19 142 }
70839da6360500 Aurabindo Pillai 2024-04-19 143
:::::: The code at line 134 was first introduced by commit
:::::: 70839da6360500a82e4d5f78499284474cbed7c1 drm/amd/display: Add new DCN401 sources
:::::: TO: Aurabindo Pillai <aurabindo.pillai@xxxxxxx>
:::::: CC: Alex Deucher <alexander.deucher@xxxxxxx>
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