Re: [PATCH v4 2/4] dt-bindings: gpio: add support for NXP S32G2/S32G3 SoCs
From: Krzysztof Kozlowski
Date: Sun Oct 06 2024 - 09:33:45 EST
On 04/10/2024 13:10, Andrei Stefanescu wrote:
>
> Just to confirm that I got it right, SIUL2 would end up being a single node,
> looking something like:
>
>
> siul2: siul2@4009c000 {
> compatible = "nxp,s32g2-siul2";
> reg = <0x4009C000 SIUL2_0_SIZE>,
> <0x44010000 SIUL2_1_SIZE>;
> gpio-controller;
> #gpio-cells = <2>;
> gpio-ranges = <&siul2 0 0 102>, <&siul2 112 112 79>;
> gpio-reserved-ranges = <102 10>, <123 21>;
> interrupt-controller;
> #interrupt-cells = <2>;
> interrupts = <GIC_SPI ..>;
>
> /* for nvmem */
> #address-cells = <1>;
> #size-cells = <1>;
>
> *-nvmem-*@index {
> reg = <index 0x4>;
> [..]
This looks like using deprecated binding. Switch to the non-deprecated
cells.
Best regards,
Krzysztof