[PATCH 3/8] iommu/amd: Add debugfs support to dump IOMMU Capability registers

[Dheeraj Kumar Srivastava]

IOMMU Capability registers defines capabilities of IOMMU and information
needed for initialising MMIO registers and device table. This is useful
to dump these registers for debugging IOMMU related issues.

e.g.To get capability registers value for iommu<x>
  # echo "0x10" > /sys/kernel/debug/iommu/amd/iommu00/capability
  # cat /sys/kernel/debug/iommu/amd/iommu00/capability_dump

Signed-off-by: Dheeraj Kumar Srivastava <dheerajkumar.srivastava@xxxxxxx>
---
 drivers/iommu/amd/debugfs.c | 77 +++++++++++++++++++++++++++++++++++++
 1 file changed, 77 insertions(+)

diff --git a/drivers/iommu/amd/debugfs.c b/drivers/iommu/amd/debugfs.c
index 30d6819e9a35..c3ef15e7b918 100644
--- a/drivers/iommu/amd/debugfs.c
+++ b/drivers/iommu/amd/debugfs.c
@@ -18,6 +18,7 @@ static struct dentry *amd_iommu_debugfs;
 #define	OFS_IN_SZ	8
 
 static int mmio_offset = -1;
+static int cap_offset = -1;
 
 static ssize_t iommu_mmio_write(struct file *filp, const char __user *ubuf,
 				size_t cnt, loff_t *ppos)
@@ -86,6 +87,78 @@ static int iommu_mmio_dump_show(struct seq_file *m, void *unused)
 }
 DEFINE_SHOW_ATTRIBUTE(iommu_mmio_dump);
 
+static ssize_t iommu_capability_write(struct file *filp, const char __user *ubuf,
+				      size_t cnt, loff_t *ppos)
+{
+	char *cap_ptr_ofs;
+	int ret = cnt;
+
+	if (cnt > OFS_IN_SZ) {
+		ret = -EINVAL;
+		goto err;
+	}
+
+	cap_ptr_ofs = memdup_user_nul(ubuf, cnt);
+	if (IS_ERR(cap_ptr_ofs)) {
+		ret = PTR_ERR(cap_ptr_ofs);
+		goto err;
+	}
+
+	if (kstrtou32(cap_ptr_ofs, 0, &cap_offset) < 0) {
+		ret = -EINVAL;
+		goto free;
+	}
+
+	/* Capability register at offset 0x14 is the last IOMMU capability register. */
+	if (cap_offset > 0x14) {
+		ret = -EINVAL;
+		goto free;
+	}
+
+	kfree(cap_ptr_ofs);
+	*ppos += cnt;
+	return ret;
+
+free:
+	kfree(cap_ptr_ofs);
+err:
+	cap_offset = -1;
+	return ret;
+}
+
+static int iommu_capability_show(struct seq_file *m, void *unused)
+{
+	if (cap_offset >= 0)
+		seq_printf(m, "0x%x\n", cap_offset);
+	else
+		seq_puts(m, "No or invalid input provided\n");
+	return 0;
+}
+DEFINE_SHOW_STORE_ATTRIBUTE(iommu_capability);
+
+static int iommu_capability_dump_show(struct seq_file *m, void *unused)
+{
+	struct amd_iommu *iommu = m->private;
+	u32 value;
+	int err;
+
+	if (cap_offset < 0) {
+		seq_puts(m, "Please provide capability register's offset\n");
+		return 0;
+	}
+
+	err = pci_read_config_dword(iommu->dev, iommu->cap_ptr + cap_offset, &value);
+	if (err) {
+		seq_printf(m, "Not able to read capability register at 0x%x\n", cap_offset);
+		return 0;
+	}
+
+	seq_printf(m, "0x%08x\n", value);
+
+	return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(iommu_capability_dump);
+
 void amd_iommu_debugfs_setup(void)
 {
 	struct amd_iommu *iommu;
@@ -101,5 +174,9 @@ void amd_iommu_debugfs_setup(void)
 				    &iommu_mmio_fops);
 		debugfs_create_file("mmio_dump", 0444, iommu->debugfs, iommu,
 				    &iommu_mmio_dump_fops);
+		debugfs_create_file("capability", 0644, iommu->debugfs, iommu,
+				    &iommu_capability_fops);
+		debugfs_create_file("capability_dump", 0444, iommu->debugfs,
+				    iommu, &iommu_capability_dump_fops);
 	}
 }
-- 
2.25.1