Re: [PATCH v2 0/3] Add initial support for Canaan Kendryte K230 pinctrl

[Conor Dooley]

On Tue, Oct 08, 2024 at 04:31:35PM +0800, Ze Huang wrote:
> On 10/1/24 8:32 PM, Conor Dooley wrote:
> > On Tue, Oct 01, 2024 at 02:27:25PM +0200, Linus Walleij wrote:
> > > On Thu, Sep 26, 2024 at 5:58 PM Ze Huang <18771902331@xxxxxxx> wrote:
> > > 
> > > > This patch series introduces support for the pinctrl driver of the Canaan
> > > > K230 SoC. The K230 SoC features 64 IO pins, each of which can be configured
> > > > for up to five different functions.
> > > > 
> > > > The controller manages the entire pin configuration and multiplexing
> > > > through a single register, which control features such as schmitt trigger,
> > > > drive strength, bias pull-up/down, input/output enable, power source, and
> > > > mux mode.
> > > > 
> > > > The changes have been tested on CanMV-K230-V1.1 board.
> > > > 
> > > > The pin function definition can be found here [1], and most of the DTS data
> > > > was converted from the vendor's code [2].
> > > Bindings ACKed and patches look good to I applied patch
> > > 1 & 2 to the pin control tree.
> > > 
> > > Please funnel patch 3 through the SoC tree.
> > > 
> > > > prerequisite-message-id: <tencent_22BA0425B4DF1CA1713B62E4423C1BFBF809@xxxxxx>
> > > > prerequisite-patch-id: 704efc6e76814e1877748959d7319d558c8386c1
> > > > prerequisite-patch-id: c2144cf468c57b856830a61615ba6ba501e8ec58
> > > > prerequisite-patch-id: ced4a01ccd8ddab2fd308d543ddf47bd1641518a
> > > > prerequisite-patch-id: f8b983b301d0c14f1448b9e4c321262a509e061e
> > > > prerequisite-patch-id: 834b65b6a2b037daed5cffc6a41963622568dc9c
> > > > prerequisite-patch-id: 2401703b57448c9ea2c3dc7650b4502491a28944
> > > I don't know about all this stuff but neither bindings or code seems
> > > to contain anything that won't compile so I just assume that any of these
> > > dependencies are purely for patch 3/3 and I nothing blocks me
> > > merging patches 1 & 2 so I just went ahead with that.
> > Yah, this should all be cos I haven't yet applied
> > https://lore.kernel.org/all/tencent_22BA0425B4DF1CA1713B62E4423C1BFBF809@xxxxxx/
> > as I am waiting for a clock driver to be sorted out.
> 
> Thank you very much for your time in reviewing and helping fix the bug!
> Indeed, only patch 3 really depends on the previous patches. We are now
> working on clock driver. Should we deal with patch 3 after that?

Yeah, send patch 3 to me when you're done with the clock driver.

Attachment: signature.asc
Description: PGP signature