Re: [PATCH 3/3] drm/vc4: Correct generation check in vc4_hvs_lut_load

From: Marek Szyprowski
Date: Wed Oct 09 2024 - 02:21:37 EST


On 08.10.2024 18:44, Dave Stevenson wrote:
> Commit 24c5ed3ddf27 ("drm/vc4: Introduce generation number enum")
> incorrectly swapped a check of hvs->vc4->is_vc5 to
> hvs->vc4->gen == VC4_GEN_4 in vc4_hvs_lut_load, hence breaking
> loading the gamma look up table on Pi0-3.
>
> Correct that conditional.
>
> Fixes: 24c5ed3ddf27 ("drm/vc4: Introduce generation number enum")
> Signed-off-by: Dave Stevenson <dave.stevenson@xxxxxxxxxxxxxxx>
Reported-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
Tested-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
> ---
> drivers/gpu/drm/vc4/vc4_hvs.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
> index c5ebc317188a..1edf6e3fa7e6 100644
> --- a/drivers/gpu/drm/vc4/vc4_hvs.c
> +++ b/drivers/gpu/drm/vc4/vc4_hvs.c
> @@ -224,7 +224,7 @@ static void vc4_hvs_lut_load(struct vc4_hvs *hvs,
> if (!drm_dev_enter(drm, &idx))
> return;
>
> - if (hvs->vc4->gen == VC4_GEN_4)
> + if (hvs->vc4->gen != VC4_GEN_4)
> goto exit;
>
> /* The LUT memory is laid out with each HVS channel in order,
>
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland