Re: [PATCH 0/2] pwm: axi-pwmgen: always enable FORCE_ALIGN

From: Uwe Kleine-König
Date: Fri Oct 11 2024 - 05:55:24 EST


On Thu, Oct 10, 2024 at 10:33:20AM +0200, Nuno Sá wrote:
> On Wed, 2024-10-09 at 16:11 -0500, David Lechner wrote:
> > When using the axi-pwmgen as a trigger for ADCs, we've found that the
> > default behavior of the PWMGEN IP block is not ideal. The default
> > behavior is to wait for the period of all PWM outputs to run out before
> > applying any new settings. But there isn't a way to block until this
> > happens (and even if there was, it could take a long time). So the
> > pwm apply function returns before the new settings are actually applied.
> >
> > This makes certain use cases impossible. For example, to use the PWM
> > like a GPIO to create a single pulse on and off to trigger a single ADC
> > conversion.
> >
> > The AXI PWMGEN has a FORCE_ALIGN configuration option that changes the
> > behavior so that any new output settings (period, duty cycle, etc.) are
> > applied immediately. This can cause glitches in the output, but makes
> > the PWM actually useable for most applications.
> >
> > Also, there was a naming conflict with register names, so there is a
> > preliminary cleanup patch to sort that out.
> >
> > ---
>
> Reviewed-by: Nuno Sa <nuno.sa@xxxxxxxxxx>

b4 diagnoses for that:
NOTE: some trailers ignored due to from/email mismatches:
! Trailer: Reviewed-by: Nuno Sa <nuno.sa@xxxxxxxxxx>
Msg From: Nuno Sá <noname.nuno@xxxxxxxxx>

I fixed that manually now, but would be nice if you'd care for matching
addresses in the future.

Best regards
Uwe

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