Re: [PATCH v8 06/25] x86/resctrl: Add support to enable/disable AMD ABMC feature

[Moger, Babu]

Hi Tony,

On 10/11/2024 1:14 PM, Tony Luck wrote:
> On Wed, Oct 09, 2024 at 12:39:31PM -0500, Babu Moger wrote:
> > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
> > index 3ae84c3b8e6d..43c9dc473aba 100644
> > --- a/arch/x86/include/asm/msr-index.h
> > +++ b/arch/x86/include/asm/msr-index.h
> > @@ -1195,6 +1195,7 @@
> >   #define MSR_IA32_MBA_BW_BASE		0xc0000200
> >   #define MSR_IA32_SMBA_BW_BASE		0xc0000280
> >   #define MSR_IA32_EVT_CFG_BASE		0xc0000400
> > +#define MSR_IA32_L3_QOS_EXT_CFG		0xc00003ff
>
> Nitpick. Most of the MSRs in this file are in numerical order (within
> each functional grouping). So this belongs before MSR_IA32_EVT_CFG_BASE
>
> Same in patch 14 which adds MSR_IA32_L3_QOS_ABMC_CFG

Yes. Will take care of this in next revision.

--
- Babu Moger