Re: [PATCH v5 04/10] dt-bindings: iio: dac: adi-axi-dac: add ad3552r axi variant

[Jonathan Cameron]

On Tue, 08 Oct 2024 17:43:36 +0200
Angelo Dureghello <adureghello@xxxxxxxxxxxx> wrote:

> From: Angelo Dureghello <adureghello@xxxxxxxxxxxx>
> 
> Add a new compatible and related bindigns for the fpga-based
> "ad3552r" AXI IP core, a variant of the generic AXI DAC IP.
> 
> The AXI "ad3552r" IP is a very similar HDL (fpga) variant of the
> generic AXI "DAC" IP, intended to control ad3552r and similar chips,
> mainly to reach high speed transfer rates using a QSPI DDR
> (dobule-data-rate) interface.
> 
> The ad3552r device is defined as a child of the AXI DAC, that in
> this case is acting as an SPI controller.
> 
Hi Angelo,

If this goes to a v6, I'd suggest adding a very brief statement that
#io-backend is present because it is possible (in theory anyway) to
use a separate controller for the control path than that used for the
datapath. 

So a one line summary of that long discussion from an earlier version!
 
Otherwise this LGTM.

Thanks,

Jonathan