Re: [PATCH v2] arm64: dts: ti: k3-j7200: Fix register map for main domain pmx

[Vaishnav Achath]

Hi Aniket, Jared,


On 26/09/24 15:55, Aniket Limaye wrote:
> From: Jared McArthur <j-mcarthur@xxxxxx>
>
> Commit 0d0a0b441346 ("arm64: dts: ti: k3-j7200: fix main pinmux
> range") split the main_pmx0 into two nodes: main_pmx0 and main_pmx1
> due to a non-addressable region, but incorrectly represented the
> ranges. As a result, the memory map for the pinctrl is incorrect. Fix
> this by introducing the correct ranges.
>
> The ranges are taken from the J7200 TRM [1] (Table 5-695. CTRL_MMR0
> Registers).
>
> Padconfig starting addresses and ranges:
> -  0 to 66: 0x11c000, 0x10c
> -       68: 0x11c110, 0x004
> - 71 to 73: 0x11c11c, 0x00c
> - 89 to 90: 0x11c164, 0x008
>
> The datasheet [2] doesn't contain PADCONFIG63 (Table 6-106. Pin
> Multiplexing), but the pin is necessary for enabling the MMC1 CLKLP
> pad loopback and should be included in the pinmux register map.
>
> Due to the change in pinmux node addresses, change the pinmux node for
> the USB0_DRVVBUS pin to main_pmx2. The offset has not changed since the
> new main_pmx2 node has the same base address and range as the original
> main_pmx1 node. All other pinmuxing done within J7200 dts or dtso files
> only uses main_pmx0 which has not changed.
>
> [1] https://www.ti.com/lit/pdf/spruiu1
> [2] https://www.ti.com/lit/gpn/dra821u
>
> Fixes: 0d0a0b441346 ("arm64: dts: ti: k3-j7200: fix main pinmux range")
> Signed-off-by: Aniket Limaye <a-limaye@xxxxxx>
> Signed-off-by: Jared McArthur <j-mcarthur@xxxxxx>

Thank you for the patch.

Reviewed-by: Vaishnav Achath <vaishnav.a@xxxxxx>

> ---
> Changes in v2:
> - Explains why PADCONFIG63 is included in the pinmux ranges when it
>    doesn't appear in the datasheet.
>
> * Nishanth
> - Use cannonical links in commit msg for the TRM and Datasheet
> - Explains the reason for the offset not changing for the USB0_DRVVBUS
>    pin and why there are no changes to other pins.
>
> - Link to v1: https://lore.kernel.org/all/20240829071208.2172825-1-a-limaye@xxxxxx/
> ---
>   .../dts/ti/k3-j7200-common-proc-board.dts     |  2 +-
>   arch/arm64/boot/dts/ti/k3-j7200-main.dtsi     | 22 +++++++++++++++++--
>   2 files changed, 21 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> index 6593c5da82c06..df39f2b1ff6ba 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> @@ -254,7 +254,7 @@ J721E_IOPAD(0x38, PIN_OUTPUT, 0) /* (Y21) MCAN3_TX */
>   	};
>   };
>   
> -&main_pmx1 {
> +&main_pmx2 {
>   	main_usbss0_pins_default: main-usbss0-default-pins {
>   		pinctrl-single,pins = <
>   			J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> index 9386bf3ef9f68..41adfa64418d0 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> @@ -426,10 +426,28 @@ main_pmx0: pinctrl@11c000 {
>   		pinctrl-single,function-mask = <0xffffffff>;
>   	};
>   
> -	main_pmx1: pinctrl@11c11c {
> +	main_pmx1: pinctrl@11c110 {
>   		compatible = "ti,j7200-padconf", "pinctrl-single";
>   		/* Proxy 0 addressing */
> -		reg = <0x00 0x11c11c 0x00 0xc>;
> +		reg = <0x00 0x11c110 0x00 0x004>;
> +		#pinctrl-cells = <1>;
> +		pinctrl-single,register-width = <32>;
> +		pinctrl-single,function-mask = <0xffffffff>;
> +	};
> +
> +	main_pmx2: pinctrl@11c11c {
> +		compatible = "ti,j7200-padconf", "pinctrl-single";
> +		/* Proxy 0 addressing */
> +		reg = <0x00 0x11c11c 0x00 0x00c>;
> +		#pinctrl-cells = <1>;
> +		pinctrl-single,register-width = <32>;
> +		pinctrl-single,function-mask = <0xffffffff>;
> +	};
> +
> +	main_pmx3: pinctrl@11c164 {
> +		compatible = "ti,j7200-padconf", "pinctrl-single";
> +		/* Proxy 0 addressing */
> +		reg = <0x00 0x11c164 0x00 0x008>;
>   		#pinctrl-cells = <1>;
>   		pinctrl-single,register-width = <32>;
>   		pinctrl-single,function-mask = <0xffffffff>;