Re: [PATCH v6 0/7] MediaTek DVFSRC Bus Bandwidth and Regulator knobs

From: AngeloGioacchino Del Regno
Date: Mon Oct 14 2024 - 04:06:46 EST


Il 12/10/24 00:15, Rob Herring ha scritto:
On Mon, Jun 10, 2024 at 3:57 AM AngeloGioacchino Del Regno
<angelogioacchino.delregno@xxxxxxxxxxxxx> wrote:

Changes in v6:
- Fixed build with clang (thanks Nathan!)
- Removed unused mtk_rmw() macro in mtk-dvfsrc.c
- Added MODULE_DESCRIPTION() to mtk-dvfsrc-regulator.c

Changes in v5:
- Fixed Kconfig dependencies in interconnect
- Fixed module build for dvfsrc and interconnect

Changes in v4:
- Updated patch [3/7] to actually remove address/size cells
as the old version got unexpectedly pushed in v3.

Changes in v3:
- Removed examples from interconnect and regulator bindings
and kept example node with interconnect and regulator in
the main DVFSRC binding as suggested
- Removed 'reg' from interconnect and regulator, removed both
address and size cells from the main DVFSRC binding as that
was not really needed
- Added anyOf-required entries in the regulator binding as it
doesn't make sense to probe it without any regulator subnode

Changes in v2:
- Fixed issues with regulator binding about useless quotes and
wrong binding path (oops)
- Removed useless 'items' from DVFSRC main binding
- Allowed address/size cells to DVFSRC main binding to resolve
validation issues on the regulator and interconnect bindings
- Changed dvfsrc node name to `system-controller`, as the DVFSRC
is actually able to control multiple system components.
- Added a commit to remove mtk-dvfs-regulator.c before adding the
new, refactored regulator driver


This series adds support for the MediaTek Dynamic Voltage and Frequency
Scaling Resource Controller (DVFSRC), found on many MediaTek SoCs.

This hardware collects requests from both software and the various remote
processors embededd into the SoC, and decides about a minimum operating
voltage and a minimum DRAM frequency to fulfill those requests, in an
effort to provide the best achievable performance per watt.

Such hardware IP is capable of transparently performing direct register
R/W on all of the DVFSRC-controlled regulators and SoC bandwidth knobs.

Summarizing how the DVFSRC works for Interconnect:

ICC provider ICC Nodes
---- ----
_________ |CPU | |--- |VPU |
_____ | |----- ---- | ----
| |->| DRAM | ---- | ----
|DRAM |->|scheduler|----- |GPU | |--- |DISP|
| |->| (EMI) | ---- | ----
|_____|->|_________|---. ----- | ----
/|\ `-|MMSYS|--|--- |VDEC|
| ----- | ----
| | ----
| change DRAM freq |--- |VENC|
-------- | ----
SMC --> | DVFSRC | | ----
-------- |--- |IMG |
| ----
| ----
|--- |CAM |
----

...and for regulators, it's simply...
SMC -> DVFSRC -> Regulator voltage decider -> (vreg) Registers R/W

Please note that this series is based on an old (abandoned) series from
MediaTek [1], and reuses some parts of the code found in that.

Besides, included in this series, there's also a refactoring of the
mtk-dvfsrc-regulator driver, which never got compiled at all, and would
not build anyway because of missing headers and typos: that commit did
not get any Fixes tag because, well, backporting makes no sense at all
as the DVFSRC support - which is critical for that driver to work - is
introduced with *this series*! :-)

P.S.: The DVFSRC regulator is a requirement for the MediaTek UFSHCI
controller's crypto boost feature, which is already upstream but
lacking the actual regulator to work....... :-)

[1]: https://lore.kernel.org/all/20210812085846.2628-1-dawei.chien@xxxxxxxxxxxx/

AngeloGioacchino Del Regno (7):
dt-bindings: regulator: Add bindings for MediaTek DVFSRC Regulators
dt-bindings: interconnect: Add MediaTek EMI Interconnect bindings
dt-bindings: soc: mediatek: Add DVFSRC bindings for MT8183 and MT8195
soc: mediatek: Add MediaTek DVFS Resource Collector (DVFSRC) driver

Looks like the driver got picked up, but not the binding.
mediatek,mt8183-dvfsrc and mediatek,mt8195-dvfsrc show up in next as
undocumented.

Thanks for making me notice. Adding it up right now.

Cheers,
Angelo