Re: [PATCH v8 2/3] PCI: rockchip: Simplify reset control handling by using reset_control_bulk*() function

From: Manivannan Sadhasivam
Date: Tue Oct 15 2024 - 01:12:02 EST

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In reply to: Anand Moon: "[PATCH v8 2/3] PCI: rockchip: Simplify reset control handling by using reset_control_bulk*() function"
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On Mon, Oct 14, 2024 at 07:22:03PM +0530, Anand Moon wrote:
> Refactor the reset control handling in the Rockchip PCIe driver,
> introduce a more robust and efficient method for assert and
> deassert reset controller using reset_control_bulk*() API. Using the
> reset_control_bulk APIs, the reset handling for the core clocks reset
> unit becomes much simpler.
>
> Spilt the reset controller in two groups as per the
> RK3399 TM 17.5.8.1 PCIe Initialization Sequence
> 17.5.8.1.1 PCIe as Root Complex.
>
> 6. De-assert the PIPE_RESET_N/MGMT_STICKY_RESET_N/MGMT_RESET_N/RESET_N
> simultaneously.
>

I'd reword it slightly:

Following the recommendations in 'Rockchip RK3399 TRM v1.3 Part2':

1. Split the reset controls into two groups as per section '17.5.8.1.1 PCIe
as Root Complex'.

2. Deassert the 'Pipe, MGMT Sticky, MGMT, Core' resets in groups as per section
'17.5.8.1.1 PCIe as Root Complex'. This is accomplished using the
reset_control_bulk APIs.

> - devm_reset_control_bulk_get_exclusive(): Allows the driver to get all
> resets defined in the DT thereby removing the hardcoded reset names
> in the driver.
> - reset_control_bulk_assert(): Allows the driver to assert the resets
> defined in the driver.
> - reset_control_bulk_deassert(): Allows the driver to deassert the resets
> defined in the driver.
>

No need to list out the APIs. Just add them to the first paragraph itself to
explain how they are used.

> Signed-off-by: Anand Moon <linux.amoon@xxxxxxxxx>

Some nitpicks below. Rest looks good.

> ---
> v8: I tried to address reviews and comments from Mani.
> Follow the sequence of De-assert as per the driver code.
> Drop the comment in the driver.
> Improve the commit message with the description of the TMP section.
> Improve the reason for the core functional changes in the commit
> description.
> Improve the error handling messages of the code.
> v7: replace devm_reset_control_bulk_get_optional_exclusive()
> with devm_reset_control_bulk_get_exclusive()
> update the functional changes.
> V6: Add reason for the split of the RESET pins.
> v5: Fix the De-assert reset core as per the TRM
> De-assert the PIPE_RESET_N/MGMT_STICKY_RESET_N/MGMT_RESET_N/RESET_N
> simultaneously.
> v4: use dev_err_probe in error path.
> v3: Fix typo in commit message, dropped reported by.
> v2: Fix compilation error reported by Intel test robot
> fixed checkpatch warning.
> ---
> drivers/pci/controller/pcie-rockchip.c | 155 +++++--------------------
> drivers/pci/controller/pcie-rockchip.h | 26 +++--
> 2 files changed, 49 insertions(+), 132 deletions(-)
>
> diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c
> index 2777ef0cb599..43d83c1f3196 100644
> --- a/drivers/pci/controller/pcie-rockchip.c
> +++ b/drivers/pci/controller/pcie-rockchip.c
> @@ -30,7 +30,7 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
> struct platform_device *pdev = to_platform_device(dev);
> struct device_node *node = dev->of_node;
> struct resource *regs;
> - int err;
> + int err, i;
>
> if (rockchip->is_rc) {
> regs = platform_get_resource_byname(pdev,
> @@ -69,55 +69,23 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
> if (rockchip->link_gen < 0 || rockchip->link_gen > 2)
> rockchip->link_gen = 2;
>
> - rockchip->core_rst = devm_reset_control_get_exclusive(dev, "core");
> - if (IS_ERR(rockchip->core_rst)) {
> - if (PTR_ERR(rockchip->core_rst) != -EPROBE_DEFER)
> - dev_err(dev, "missing core reset property in node\n");
> - return PTR_ERR(rockchip->core_rst);
> - }
> -
> - rockchip->mgmt_rst = devm_reset_control_get_exclusive(dev, "mgmt");
> - if (IS_ERR(rockchip->mgmt_rst)) {
> - if (PTR_ERR(rockchip->mgmt_rst) != -EPROBE_DEFER)
> - dev_err(dev, "missing mgmt reset property in node\n");
> - return PTR_ERR(rockchip->mgmt_rst);
> - }
> -
> - rockchip->mgmt_sticky_rst = devm_reset_control_get_exclusive(dev,
> - "mgmt-sticky");
> - if (IS_ERR(rockchip->mgmt_sticky_rst)) {
> - if (PTR_ERR(rockchip->mgmt_sticky_rst) != -EPROBE_DEFER)
> - dev_err(dev, "missing mgmt-sticky reset property in node\n");
> - return PTR_ERR(rockchip->mgmt_sticky_rst);
> - }
> -
> - rockchip->pipe_rst = devm_reset_control_get_exclusive(dev, "pipe");
> - if (IS_ERR(rockchip->pipe_rst)) {
> - if (PTR_ERR(rockchip->pipe_rst) != -EPROBE_DEFER)
> - dev_err(dev, "missing pipe reset property in node\n");
> - return PTR_ERR(rockchip->pipe_rst);
> - }
> + for (i = 0; i < ROCKCHIP_NUM_PM_RSTS; i++)
> + rockchip->pm_rsts[i].id = rockchip_pci_pm_rsts[i];
>
> - rockchip->pm_rst = devm_reset_control_get_exclusive(dev, "pm");
> - if (IS_ERR(rockchip->pm_rst)) {
> - if (PTR_ERR(rockchip->pm_rst) != -EPROBE_DEFER)
> - dev_err(dev, "missing pm reset property in node\n");
> - return PTR_ERR(rockchip->pm_rst);
> - }
> + err = devm_reset_control_bulk_get_exclusive(dev,
> + ROCKCHIP_NUM_PM_RSTS,
> + rockchip->pm_rsts);
> + if (err)
> + return dev_err_probe(dev, err, "Cannot get the PM reset control\n");

"Couldn't get PM resets"

>
> - rockchip->pclk_rst = devm_reset_control_get_exclusive(dev, "pclk");
> - if (IS_ERR(rockchip->pclk_rst)) {
> - if (PTR_ERR(rockchip->pclk_rst) != -EPROBE_DEFER)
> - dev_err(dev, "missing pclk reset property in node\n");
> - return PTR_ERR(rockchip->pclk_rst);
> - }
> + for (i = 0; i < ROCKCHIP_NUM_CORE_RSTS; i++)
> + rockchip->core_rsts[i].id = rockchip_pci_core_rsts[i];
>
> - rockchip->aclk_rst = devm_reset_control_get_exclusive(dev, "aclk");
> - if (IS_ERR(rockchip->aclk_rst)) {
> - if (PTR_ERR(rockchip->aclk_rst) != -EPROBE_DEFER)
> - dev_err(dev, "missing aclk reset property in node\n");
> - return PTR_ERR(rockchip->aclk_rst);
> - }
> + err = devm_reset_control_bulk_get_exclusive(dev,
> + ROCKCHIP_NUM_CORE_RSTS,
> + rockchip->core_rsts);
> + if (err)
> + return dev_err_probe(dev, err, "Cannot get the CORE reset control\n");

"Couldn't get Core resets"

>
> if (rockchip->is_rc) {
> rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep",
> @@ -147,23 +115,10 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
> int err, i;
> u32 regs;
>
> - err = reset_control_assert(rockchip->aclk_rst);
> - if (err) {
> - dev_err(dev, "assert aclk_rst err %d\n", err);
> - return err;
> - }
> -
> - err = reset_control_assert(rockchip->pclk_rst);
> - if (err) {
> - dev_err(dev, "assert pclk_rst err %d\n", err);
> - return err;
> - }
> -
> - err = reset_control_assert(rockchip->pm_rst);
> - if (err) {
> - dev_err(dev, "assert pm_rst err %d\n", err);
> - return err;
> - }
> + err = reset_control_bulk_assert(ROCKCHIP_NUM_PM_RSTS,
> + rockchip->pm_rsts);
> + if (err)
> + return dev_err_probe(dev, err, "Couldn't assert PM resets\n");
>
> for (i = 0; i < MAX_LANE_NUM; i++) {
> err = phy_init(rockchip->phys[i]);
> @@ -173,47 +128,17 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
> }
> }
>
> - err = reset_control_assert(rockchip->core_rst);
> - if (err) {
> - dev_err(dev, "assert core_rst err %d\n", err);
> - goto err_exit_phy;
> - }
> -
> - err = reset_control_assert(rockchip->mgmt_rst);
> - if (err) {
> - dev_err(dev, "assert mgmt_rst err %d\n", err);
> - goto err_exit_phy;
> - }
> -
> - err = reset_control_assert(rockchip->mgmt_sticky_rst);
> - if (err) {
> - dev_err(dev, "assert mgmt_sticky_rst err %d\n", err);
> - goto err_exit_phy;
> - }
> -
> - err = reset_control_assert(rockchip->pipe_rst);
> - if (err) {
> - dev_err(dev, "assert pipe_rst err %d\n", err);
> - goto err_exit_phy;
> - }
> + err = reset_control_bulk_assert(ROCKCHIP_NUM_CORE_RSTS,
> + rockchip->core_rsts);
> + if (err)
> + return dev_err_probe(dev, err, "Couldn't assert Core resets\n");

"Couldn't assert Core resets\n"

>
> udelay(10);
>
> - err = reset_control_deassert(rockchip->pm_rst);
> - if (err) {
> - dev_err(dev, "deassert pm_rst err %d\n", err);
> - goto err_exit_phy;
> - }
> -
> - err = reset_control_deassert(rockchip->aclk_rst);
> + err = reset_control_bulk_deassert(ROCKCHIP_NUM_PM_RSTS,
> + rockchip->pm_rsts);
> if (err) {
> - dev_err(dev, "deassert aclk_rst err %d\n", err);
> - goto err_exit_phy;
> - }
> -
> - err = reset_control_deassert(rockchip->pclk_rst);
> - if (err) {
> - dev_err(dev, "deassert pclk_rst err %d\n", err);
> + dev_err(dev, "Couldn't deassert PM resets %d\n", err);

"Couldn't deassert PM resets: %d\n"

> goto err_exit_phy;
> }
>
> @@ -252,35 +177,15 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
> goto err_power_off_phy;
> }
>
> - /*
> - * Please don't reorder the deassert sequence of the following
> - * four reset pins.
> - */
> - err = reset_control_deassert(rockchip->mgmt_sticky_rst);
> - if (err) {
> - dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err);
> - goto err_power_off_phy;
> - }
> -
> - err = reset_control_deassert(rockchip->core_rst);
> + err = reset_control_bulk_deassert(ROCKCHIP_NUM_CORE_RSTS,
> + rockchip->core_rsts);
> if (err) {
> - dev_err(dev, "deassert core_rst err %d\n", err);
> - goto err_power_off_phy;
> - }
> -
> - err = reset_control_deassert(rockchip->mgmt_rst);
> - if (err) {
> - dev_err(dev, "deassert mgmt_rst err %d\n", err);
> - goto err_power_off_phy;
> - }
> -
> - err = reset_control_deassert(rockchip->pipe_rst);
> - if (err) {
> - dev_err(dev, "deassert pipe_rst err %d\n", err);
> + dev_err(dev, "Couldn't deassert CORE err %d\n", err);

"Couldn't deassert Core resets: %d\n"

> goto err_power_off_phy;
> }
>
> return 0;
> +

Spurious change.

- Mani

--
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Next message: Peter Schneider: "Re: [PATCH 6.11 000/214] 6.11.4-rc1 review"
Previous message: Neeraj Upadhyay: "Re: [PATCH rcu 05/12] srcu: Standardize srcu_data pointers to "sdp" and similar"
In reply to: Anand Moon: "[PATCH v8 2/3] PCI: rockchip: Simplify reset control handling by using reset_control_bulk*() function"
Next in thread: Anand Moon: "[PATCH v8 3/3] PCI: rockchip: Refactor rockchip_pcie_disable_clocks() function signature"
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