[PATCH 0/5] cxl: Some preparation work for type2 accelerators support

[Huang Ying]

This series implement some preparation work for the type2 accelerators
support.

We have tested the series with cxl_test via mocking a type2
accelerator as in [1].  Because we need more type2 accelerators
support to simulate a type2 device, we don't include the cxl_test
patch in the series.

[1] https://lore.kernel.org/linux-cxl/168592149709.1948938.8663425987110396027.stgit@xxxxxxxxxxxxxxxxxxxxxxxxx/

Changes:

RFC->v1:

- Collected Reviewed-by, Thanks Davidlohr and Gregory.

- Some minor fixes, Thanks Ben and others

- Thanks Jonathan to suggest to revise type2/type3 and coherence naming.

- Rebased to latest upstream

- Link to RFC: https://lore.kernel.org/linux-cxl/20240925024647.46735-1-ying.huang@xxxxxxxxx/

Huang Ying (5):
  cxl: Rename ACPI_CEDT_CFMWS_RESTRICT_TYPE2/TYPE3
  cxl: Rename CXL_DECODER_HOSTONLYMEM/DEVMEM
  cxl: Separate coherence from target type
  cxl: Set type of region to that of the first endpoint
  cxl: Avoid to create dax regions for type2 accelerators

 drivers/cxl/acpi.c           |  9 +++---
 drivers/cxl/core/hdm.c       | 38 +++++++++++++----------
 drivers/cxl/core/mbox.c      |  1 +
 drivers/cxl/core/port.c      | 17 ++++++-----
 drivers/cxl/core/region.c    | 58 ++++++++++++++++++++++++++++++------
 drivers/cxl/cxl.h            | 29 ++++++++++++------
 drivers/cxl/cxlmem.h         | 12 ++++++++
 include/acpi/actbl1.h        | 10 +++----
 tools/testing/cxl/test/cxl.c | 24 +++++++--------
 9 files changed, 135 insertions(+), 63 deletions(-)

Best Regards,
Huang, Ying