[PATCH RFC 1/4] dt-bindings: iio: adc: ad7380: add adaq4370-4 and adaq4380-4 compatible parts

From: Julien Stephan
Date: Tue Oct 15 2024 - 05:09:26 EST


adaq4370-4 (2MSPS) and adaq4380-4 (4MSPS) are quad-channel precision data
acquisition signal chain μModule solutions compatible with the ad738x
family, with the following differences:

- configurable gain in front of each 4 adc
- internal reference is 3V derived from refin-supply (5V)
- additional supplies

To configure the gain a new patternProperties is added to describe each
channel. It is restricted to adaq devices.

Signed-off-by: Julien Stephan <jstephan@xxxxxxxxxxxx>
---
.../devicetree/bindings/iio/adc/adi,ad7380.yaml | 117 +++++++++++++++++++++
1 file changed, 117 insertions(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml
index 74d82721637c..3007d8e39684 100644
--- a/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml
@@ -25,6 +25,8 @@ description: |
* https://www.analog.com/en/products/ad7386-4.html
* https://www.analog.com/en/products/ad7387-4.html
* https://www.analog.com/en/products/ad7388-4.html
+ * https://www.analog.com/en/products/adaq4370-4.html
+ * https://www.analog.com/en/products/adaq4380-4.html


$ref: /schemas/spi/spi-peripheral-props.yaml#
@@ -46,6 +48,8 @@ properties:
- adi,ad7386-4
- adi,ad7387-4
- adi,ad7388-4
+ - adi,adaq4370-4
+ - adi,adaq4380-4

reg:
maxItems: 1
@@ -59,6 +63,9 @@ properties:
vlogic-supply: true
refio-supply: true
refin-supply: true
+ vs-p-supply: true
+ vs-n-supply: true
+ ldo-supply: true

aina-supply:
description:
@@ -86,12 +93,43 @@ properties:
specify the ALERT interrupt.
maxItems: 1

+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
required:
- compatible
- reg
- vcc-supply
- vlogic-supply

+patternProperties:
+ "^channel@([0-3])$":
+ $ref: adc.yaml
+ type: object
+
+ properties:
+ reg:
+ description:
+ The channel number. From 0 to 3 corresponding to channels A,B,C,D
+ items:
+ minimum: 0
+ maximum: 3
+
+ adi,gain-milli:
+ description:
+ The hardware gain applied to the ADC input (in milli units).
+ If not present, default to 1000 (no actual gain applied).
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 1000
+
+ required:
+ - reg
+
+ additionalProperties: false
+
unevaluatedProperties: false

allOf:
@@ -128,7 +166,21 @@ allOf:
ainc-supply: false
aind-supply: false

+ # Using channel to declare gain property only applies to adaq devices
+ - if:
+ properties:
+ compatible:
+ not:
+ contains:
+ enum:
+ - adi,adaq4370-4
+ - adi,adaq4380-4
+ then:
+ patternProperties:
+ "^channel@([0-3])$": false
+
# ad7380-4 uses refin-supply as external reference.
+ # adaq devices use internal reference only, derived from refin-supply
# All other chips from ad738x family use refio as optional external reference.
# When refio-supply is omitted, internal reference is used.
- if:
@@ -136,6 +188,8 @@ allOf:
compatible:
enum:
- adi,ad7380-4
+ - adi,adaq4370-4
+ - adi,adaq4380-4
then:
properties:
refio-supply: false
@@ -145,6 +199,24 @@ allOf:
properties:
refin-supply: false

+ # adaq devices need more supplies
+ - if:
+ properties:
+ compatible:
+ enum:
+ - adi,adaq4370-4
+ - adi,adaq4380-4
+ then:
+ required:
+ - vs-p-supply
+ - vs-n-supply
+ - ldo-supply
+ else:
+ properties:
+ vs-p-supply: false
+ vs-n-supply: false
+ ldo-supply: false
+
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
@@ -169,3 +241,48 @@ examples:
refio-supply = <&supply_2_5V>;
};
};
+
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ adc@0 {
+ compatible = "adi,adaq4380-4";
+ reg = <0>;
+
+ spi-cpol;
+ spi-cpha;
+ spi-max-frequency = <80000000>;
+
+ interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-parent = <&gpio0>;
+
+ vcc-supply = <&supply_3_3V>;
+ vlogic-supply = <&supply_3_3V>;
+ refin-supply = <&supply_5V>;
+ vs-p-supply = <&supply_5V>;
+ vs-n-supply = <&supply_0V>;
+ ldo-supply = <&supply_5V>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ channel@0 {
+ reg = <0>;
+ adi,gain-milli = <300>;
+ };
+
+ channel@2 {
+ reg = <2>;
+ adi,gain-milli = <600>;
+ };
+
+ channel@3 {
+ reg = <3>;
+ adi,gain-milli = <1000>;
+ };
+ };
+ };

--
2.46.0