Re: AMD zen microcode updates breaks boot
From: Dr. David Alan Gilbert
Date: Fri Oct 18 2024 - 13:59:41 EST
* Jens Axboe (axboe@xxxxxxxxx) wrote:
> On 10/18/24 10:45 AM, Dr. David Alan Gilbert wrote:
> > * Borislav Petkov (bp@xxxxxxxxx) wrote:
> >> On Fri, Oct 18, 2024 at 07:30:15AM -0600, Jens Axboe wrote:
> >>> At least on mine, the BIOS has an option that says something like "L3
> >>> cache as numa domain", which is on and why there's 32 nodes on that box.
> >>> It's pretty handy for testing since there's a crap ton of CPUs, as it
> >>> makes affinity handling easier.
> >>
> >> Right, so two boxes I tested with this:
> >>
> >> * 2 socket, a bit different microcode:
> >>
> >> [ 22.947525] smp: Brought up 32 nodes, 512 CPUs
> >>
> >> * your CPU, one socket:
> >>
> >> [ 26.830137] smp: Brought up 16 nodes, 255 CPUs
> >
> > (Probably unrelated but...)
> > What happened to number 256 ?
>
> Quick guess, maybe iommu was off, will cap it to 255. IIRC...
Ah OK.
Dave
> --
> Jens Axboe
>
>
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