Re: [net-next PATCH 2/6] octeontx2-af: CN20k basic mbox operations and structures
From: Sai Krishna Gajula
Date: Mon Oct 21 2024 - 08:54:57 EST
> -----Original Message-----
> From: Kalesh Anakkur Purayil <kalesh-anakkur.purayil@xxxxxxxxxxxx>
> Sent: Monday, October 21, 2024 9:01 AM
> To: Sai Krishna Gajula <saikrishnag@xxxxxxxxxxx>
> Cc: davem@xxxxxxxxxxxxx; edumazet@xxxxxxxxxx; kuba@xxxxxxxxxx;
> pabeni@xxxxxxxxxx; netdev@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> Sunil Kovvuri Goutham <sgoutham@xxxxxxxxxxx>; Geethasowjanya Akula
> <gakula@xxxxxxxxxxx>; Linu Cherian <lcherian@xxxxxxxxxxx>; Jerin Jacob
> <jerinj@xxxxxxxxxxx>; Hariprasad Kelam <hkelam@xxxxxxxxxxx>; Subbaraya
> Sundeep Bhatta <sbhatta@xxxxxxxxxxx>
> Subject: Re: [net-next PATCH 2/6] octeontx2-af: CN20k basic
> mbox operations and structures
>
> On Sat, Oct 19, 2024 at 2:02 AM Sai Krishna <saikrishnag@xxxxxxxxxxx>
> wrote:
> >
> > This patch adds basic mbox operation APIs and structures to add support
> > for mbox module on CN20k silicon. There are few CSR offsets, interrupts
> > changed between CN20k and prior Octeon series of devices.
> >
> > Signed-off-by: Sunil Kovvuri Goutham <sgoutham@xxxxxxxxxxx>
> > Signed-off-by: Sai Krishna <saikrishnag@xxxxxxxxxxx>
> > ---
> > .../ethernet/marvell/octeontx2/af/Makefile | 3 +-
> > .../ethernet/marvell/octeontx2/af/cn20k/api.h | 22 +++++++
> > .../marvell/octeontx2/af/cn20k/mbox_init.c | 52 +++++++++++++++
> > .../ethernet/marvell/octeontx2/af/cn20k/reg.h | 27 ++++++++
> > .../net/ethernet/marvell/octeontx2/af/mbox.c | 3 +
> > .../net/ethernet/marvell/octeontx2/af/mbox.h | 7 ++
> > .../net/ethernet/marvell/octeontx2/af/rvu.c | 65 +++++++++++++++----
> > .../net/ethernet/marvell/octeontx2/af/rvu.h | 22 +++++++
> > .../marvell/octeontx2/af/rvu_struct.h | 6 +-
> > 9 files changed, 192 insertions(+), 15 deletions(-)
> > create mode 100644
> drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h
> > create mode 100644
> drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
> > create mode 100644
> drivers/net/ethernet/marvell/octeontx2/af/cn20k/reg.h
> >
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/Makefile
> b/drivers/net/ethernet/marvell/octeontx2/af/Makefile
> > index 3cf4c8285c90..38d8599dc6eb 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/af/Makefile
> > +++ b/drivers/net/ethernet/marvell/octeontx2/af/Makefile
> > @@ -11,4 +11,5 @@ rvu_mbox-y := mbox.o rvu_trace.o
> > rvu_af-y := cgx.o rvu.o rvu_cgx.o rvu_npa.o rvu_nix.o \
> > rvu_reg.o rvu_npc.o rvu_debugfs.o ptp.o rvu_npc_fs.o \
> > rvu_cpt.o rvu_devlink.o rpm.o rvu_cn10k.o rvu_switch.o \
> > - rvu_sdp.o rvu_npc_hash.o mcs.o mcs_rvu_if.o mcs_cnf10kb.o
> > + rvu_sdp.o rvu_npc_hash.o mcs.o mcs_rvu_if.o mcs_cnf10kb.o \
> > + cn20k/mbox_init.o
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h
> b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h
> > new file mode 100644
> > index 000000000000..b57bd38181aa
> > --- /dev/null
> > +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h
> > @@ -0,0 +1,22 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/* Marvell RVU Admin Function driver
> > + *
> > + * Copyright (C) 2024 Marvell.
> > + *
> > + */
> > +
> > +#ifndef CN20K_API_H
> > +#define CN20K_API_H
> > +
> > +#include "../rvu.h"
> > +
> > +struct ng_rvu {
> > + struct mbox_ops *rvu_mbox_ops;
> > + struct qmem *pf_mbox_addr;
> > +};
> > +
> > +/* Mbox related APIs */
> > +int cn20k_rvu_mbox_init(struct rvu *rvu, int type, int num);
> > +int cn20k_rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,
> > + int num, int type, unsigned long *pf_bmap);
> > +#endif /* CN20K_API_H */
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
> b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
> > new file mode 100644
> > index 000000000000..0d7ad31e5dfb
> > --- /dev/null
> > +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c
> > @@ -0,0 +1,52 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/* Marvell RVU Admin Function driver
> > + *
> > + * Copyright (C) 2024 Marvell.
> > + *
> > + */
> > +
> > +#include <linux/interrupt.h>
> > +#include <linux/irq.h>
> > +
> > +#include "rvu_trace.h"
> > +#include "mbox.h"
> > +#include "reg.h"
> > +#include "api.h"
> > +
> > +int cn20k_rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,
> > + int num, int type, unsigned long *pf_bmap)
> > +{
> > + int region;
> > + u64 bar;
> > +
> > + for (region = 0; region < num; region++) {
> > + if (!test_bit(region, pf_bmap))
> > + continue;
> > +
> > + bar = (u64)phys_to_virt((u64)rvu->ng_rvu->pf_mbox_addr->base);
> > + bar += region * MBOX_SIZE;
> > +
> > + mbox_addr[region] = (void *)bar;
> > +
> > + if (!mbox_addr[region])
> > + goto error;
> [Kalesh] Maybe you can return directly from here as there is no
> cleanup action performed under the label.
Ack, will submit V2 patch with the suggested changes.
> > + }
> > + return 0;
> > +
> > +error:
> > + return -ENOMEM;
> > +}
> > +
> > +int cn20k_rvu_mbox_init(struct rvu *rvu, int type, int ndevs)
> > +{
> > + int dev;
> > +
> > + if (!is_cn20k(rvu->pdev))
> > + return 0;
> > +
...
...
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
> b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
> > index 938a911cbf1c..9fd7aea8c481 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
> > +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
> > @@ -444,6 +444,10 @@ struct mbox_wq_info {
> > struct workqueue_struct *mbox_wq;
> > };
> >
> > +struct mbox_ops {
> > + irqreturn_t (*pf_intr_handler)(int irq, void *rvu_irq);
> > +};
> > +
> > struct channel_fwdata {
> > struct sdp_node_info info;
> > u8 valid;
> > @@ -594,6 +598,7 @@ struct rvu {
> > spinlock_t cpt_intr_lock;
> >
> > struct mutex mbox_lock; /* Serialize mbox up and down msgs */
> > + struct ng_rvu *ng_rvu;
> > };
> >
> > static inline void rvu_write64(struct rvu *rvu, u64 block, u64 offset, u64 val)
> > @@ -875,11 +880,28 @@ static inline bool is_cgx_vf(struct rvu *rvu, u16
> pcifunc)
> > is_pf_cgxmapped(rvu, rvu_get_pf(pcifunc)));
> > }
> >
> > +#define CN20K_CHIPID 0x20
> > +
> > +/*
> > + * Silicon check for CN20K family
> > + */
> > +static inline bool is_cn20k(struct pci_dev *pdev)
> > +{
> > + if ((pdev->subsystem_device & 0xFF) == CN20K_CHIPID)
> > + return true;
> > +
> > + return false;
> [Kalesh] You can simplify this as:
> return (pdev->subsystem_device & 0xFF) == CN20K_CHIPID;
Ack, will submit V2 patch with the suggested changes.
> > +}
> > +
> > #define M(_name, _id, fn_name, req, rsp) \
> > int rvu_mbox_handler_ ## fn_name(struct rvu *, struct req *, struct rsp *);
> > MBOX_MESSAGES
> > #undef M
> >
> > +/* Mbox APIs */
> > +void rvu_queue_work(struct mbox_wq_info *mw, int first,
> > + int mdevs, u64 intr);
> > +
> > int rvu_cgx_init(struct rvu *rvu);
> > int rvu_cgx_exit(struct rvu *rvu);
> > void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu);
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h
> b/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h
> > index fc8da2090657..90cb063d00f0 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h
> > +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h
> > @@ -33,7 +33,8 @@ enum rvu_block_addr_e {
> > BLKADDR_NDC_NIX1_RX = 0x10ULL,
> > BLKADDR_NDC_NIX1_TX = 0x11ULL,
> > BLKADDR_APR = 0x16ULL,
> > - BLK_COUNT = 0x17ULL,
> > + BLKADDR_MBOX = 0x1bULL,
> > + BLK_COUNT = 0x1cULL,
> > };
> >
> > /* RVU Block Type Enumeration */
> > @@ -49,7 +50,8 @@ enum rvu_block_type_e {
> > BLKTYPE_TIM = 0x8,
> > BLKTYPE_CPT = 0x9,
> > BLKTYPE_NDC = 0xa,
> > - BLKTYPE_MAX = 0xa,
> > + BLKTYPE_MBOX = 0x13,
> > + BLKTYPE_MAX = 0x13,
> > };
> >
> > /* RVU Admin function Interrupt Vector Enumeration */
> > --
> > 2.25.1
> >
> >
>
>
> --
> Regards,
> Kalesh A P