RE: [PATCH v7 4/5] x86/mce/apei: Handle variable register array size

[Zhuo, Qiuxu]

> From: Avadhut Naik <avadhut.naik@xxxxxxx>
> Sent: Wednesday, October 23, 2024 3:37 AM
> To: x86@xxxxxxxxxx; linux-edac@xxxxxxxxxxxxxxx; linux-trace-
> kernel@xxxxxxxxxxxxxxx
> Cc: linux-kernel@xxxxxxxxxxxxxxx; bp@xxxxxxxxx; Luck, Tony
> <tony.luck@xxxxxxxxx>; Zhuo, Qiuxu <qiuxu.zhuo@xxxxxxxxx>;
> tglx@xxxxxxxxxxxxx; mingo@xxxxxxxxxx; rostedt@xxxxxxxxxxx;
> mchehab@xxxxxxxxxx; yazen.ghannam@xxxxxxx; john.allen@xxxxxxx;
> avadhut.naik@xxxxxxx
> Subject: [PATCH v7 4/5] x86/mce/apei: Handle variable register array size
> 
> From: Yazen Ghannam <yazen.ghannam@xxxxxxx>
> 
> ACPI Boot Error Record Table (BERT) is being used by the kernel to report
> errors that occurred in a previous boot. On some modern AMD systems,
> these very errors within the BERT are reported through the
> x86 Common Platform Error Record (CPER) format which consists of one or
> more Processor Context Information Structures. These context structures
> provide a starting address and represent an x86 MSR range in which the data
> constitutes a contiguous set of MSRs starting from, and including the starting
> address.
> 
> It's common, for AMD systems that implement this behavior, that the MSR
> range represents the MCAX register space used for the Scalable MCA feature.
> The apei_smca_report_x86_error() function decodes and passes this
> information through the MCE notifier chain. However, this function assumes
> a fixed register size based on the original HW/FW implementation.
> 
> This assumption breaks with the addition of two new MCAX registers viz.
> MCA_SYND1 and MCA_SYND2. These registers are added at the end of the
> MCAX register space, so they won't be included when decoding the CPER
> data.
> 
> Rework apei_smca_report_x86_error() to support a variable register array
> size. This covers any case where the MSR context information starts at the
> MCAX address for MCA_STATUS and ends at any other register within the
> MCAX register space.
> 
> Add code comments indicating the MCAX register at each offset.
> 
> [Yazen: Add Avadhut as co-developer for wrapper changes.]
> 
> Co-developed-by: Avadhut Naik <avadhut.naik@xxxxxxx>
> Signed-off-by: Avadhut Naik <avadhut.naik@xxxxxxx>
> Signed-off-by: Yazen Ghannam <yazen.ghannam@xxxxxxx>
> Signed-off-by: Avadhut Naik <avadhut.naik@xxxxxxx>

LGTM.

    Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@xxxxxxxxx>