Re: [REGRESSION] spi: cadence-quadspi: STIG mode results in timeouts for Micron MT25QL01 flash

From: Stefan Kerkmann
Date: Thu Oct 24 2024 - 03:14:58 EST


Hello,

On 22.10.24 18:39, Mark Brown wrote:
> On Mon, Oct 21, 2024 at 11:58:07AM +0200, Linux regression tracking (Thorsten Leemhuis) wrote:
>
>> The culprit afaics was merged for v6.3-rc1. Makes me wonder: would
>> reverting this now even an option to fix this in mainline, or would this
>> just lead to a regression for someone else?
>
> Given the description of the original commit I'd expect so. My guess
> would be that this is either tuning of the lengths involved or a quirk
> that's needed to disable STIG on some devices.

Adding a quirk came to my mind as well. I unfortunately do not have a different
QSPI chip to test against to see if it is a specific combination of peripheral
and chip or if using STIG is generally broken on the socfpga. With trying
different lenghts do you refeer to `CQSPI_STIG_DATA_LEN_MAX`?

Regards,
Stefan

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