Re: [PATCH V2 net 1/9] net: hns3: default enable tx bounce buffer when smmu enabled

[Jijie Shao]

on 2024/10/24 16:26, Paolo Abeni wrote:
> On 10/18/24 12:10, Jijie Shao wrote:
> > From: Peiyang Wang <wangpeiyang1@xxxxxxxxxx>
> >
> > The SMMU engine on HIP09 chip has a hardware issue.
> > SMMU pagetable prefetch features may prefetch and use a invalid PTE
> > even the PTE is valid at that time. This will cause the device trigger
> > fake pagefaults. The solution is to avoid prefetching by adding a
> > SYNC command when smmu mapping a iova. But the performance of nic has a
> > sharp drop. Then we do this workaround, always enable tx bounce buffer,
> > avoid mapping/unmapping on TX path.
> >
> > This issue only affects HNS3, so we always enable
> > tx bounce buffer when smmu enabled to improve performance.
> >
> > Signed-off-by: Peiyang Wang <wangpeiyang1@xxxxxxxxxx>
> > Signed-off-by: Jian Shen <shenjian15@xxxxxxxxxx>
> > Signed-off-by: Jijie Shao <shaojijie@xxxxxxxxxx>
> I'm sorry to nick pick on somewhat small details, but we really need a
> fixes tag here to make 110% clear is a bugfix. I guess it could be the
> commit introducing the support for the buggy H/W.
>
> Thanks,
>
> Paolo

I have a little doubt that this patch is about H/W problem,
so how can we write the the fixes tag?

Thanks,
Jijie Shao