Re: [PATCH RFC v4 15/15] iio: adc: ad4695: Add support for SPI offload
From: Jonathan Cameron
Date: Sun Oct 27 2024 - 05:15:36 EST
On Sat, 26 Oct 2024 19:05:44 -0500
David Lechner <dlechner@xxxxxxxxxxxx> wrote:
> On 10/26/24 11:00 AM, Jonathan Cameron wrote:
> > On Wed, 23 Oct 2024 15:59:22 -0500
> > David Lechner <dlechner@xxxxxxxxxxxx> wrote:
> >
>
> ...
>
> >> static int ad4695_write_raw(struct iio_dev *indio_dev,
> >> struct iio_chan_spec const *chan,
> >> int val, int val2, long mask)
> >> @@ -779,6 +992,17 @@ static int ad4695_write_raw(struct iio_dev *indio_dev,
> >> default:
> >> return -EINVAL;
> >> }
> >> + case IIO_CHAN_INFO_SAMP_FREQ: {
> >> + struct pwm_state state;
> >> +
> >> + if (val <= 0)
> >> + return -EINVAL;
> >> +
> >> + guard(mutex)(&st->cnv_pwm_lock);
> >> + pwm_get_state(st->cnv_pwm, &state);
> >
> > What limits this to rates the ADC can cope with?
> >
>
> Nothing at the moment. The "obvious" thing to do would
> be to limit this to the max rate from the datasheet.
>
> But that feels a little too strict to me since maybe the
> PWM can't get exactly the max rate, but can get the max
> rate + 1% or so. It seems like we should allow that too.
> It's not like the ADC is going to not work if we go a
> few Hz over the datasheet rating.
>
> Maybe limit it to max + 10% or something like that?
Clamp it at datasheet value. That's what is presumably verified
not 10% over. If that needs relaxing in future, the datasheet should
be updated to reflect the higher verified value.
Jonathan