Re: [PATCH v9 0/8] iio: add support for the ad3552r AXI DAC IP
From: David Lechner
Date: Tue Oct 29 2024 - 15:08:28 EST
On 10/28/24 4:45 PM, Angelo Dureghello wrote:
> Purpose is to add ad3552r AXI DAC (fpga-based) support.
>
> The "ad3552r" AXI IP, a variant of the generic "DAC" AXI IP,
> has been created to reach the maximum speed (33MUPS) supported
> from the ad3552r. To obtain the maximum transfer rate, a custom
> IP core module has been implemented with a QSPI interface with
> DDR (Double Data Rate) mode.
>
> The design is actually using the DAC backend since the register
> map is the same of the generic DAC IP, except for some customized
> bitfields. For this reason, a new "compatible" has been added
> in adi-axi-dac.c.
>
> Also, backend has been extended with all the needed functions
> for this use case, keeping the names gneric.
>
> The following patch is actually applying to linux-iio/testing.
>
> ---
Reviewed-by: David Lechner <dlechner@xxxxxxxxxxxx>