Re: [PATCH 1/4] arm64: dts: agilex5: add gpio0

[Krzysztof Kozlowski]

On 30/10/2024 13:10, Steffen Trumtrar wrote:
> gpio0 is the same as gpio1 with a different base address.
> 
> Signed-off-by: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx>
> ---
>  arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 1162978329c1637aa0fd9a4adef16a9ae5017ac3..57c28e284cccdb99ede6cea2bc0e8dd8aaf47fe9 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -222,6 +222,26 @@ i3c1: i3c@10da1000 {
>  			status = "disabled";
>  		};
>  
> +		gpio0: gpio@10c03200 {
> +			compatible = "snps,dw-apb-gpio";
> +			reg = <0x10c03200 0x100>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			resets = <&rst GPIO0_RESET>;
> +			status = "disabled";

Why is this node disabled? Any external resources missing?

Best regards,
Krzysztof