Re: [PATCH 2/3] gpiolib: fix debugfs dangling chip separator

[Bartosz Golaszewski]

On Thu, Oct 31, 2024 at 6:07 PM Johan Hovold <johan@xxxxxxxxxx> wrote:
>
> On Thu, Oct 31, 2024 at 06:02:43PM +0100, Bartosz Golaszewski wrote:
>
> > But with this change we go from an incorrect:
> >
> > # cat /sys/kernel/debug/gpio
> > gpiochip0: (dangling chip)
> > gpiochip1: (dangling chip)
> > gpiochip2: (dangling chip)root@qemux86-64:~#
> >
> > to still incorrect:
> >
> > # cat /sys/kernel/debug/gpio
> > gpiochip0: (dangling chip)
> >
> > gpiochip1: (dangling chip)
> >
> > gpiochip2: (dangling chip)
>
> Why do you think this is incorrect? Every chip section is separated by
> an empty line, just as it should be:
>
> gpiochip0: GPIOs 512-517, parent: platform/c42d000.spmi:pmic@0:gpio@8800, c42d000.spmi:pmic@0:gpio@8800:
>  gpio1 : in   low  normal  vin-0 no pull                     push-pull  low     atest-1 dtest-0
>  gpio2 : in   low  normal  vin-0 no pull                     push-pull  low     atest-1 dtest-0
>  gpio3 : out  low  func1   vin-0 pull-down 10uA              push-pull  low     atest-1 dtest-0
>  gpio4 : in   low  normal  vin-0 pull-down 10uA              push-pull  low     atest-1 dtest-0
>  gpio5 : ---
>  gpio6 : in   high normal  vin-0 pull-up 30uA                push-pull  low     atest-1 dtest-0
>
> gpiochip1: GPIOs 518-529, parent: platform/c42d000.spmi:pmic@1:gpio@8800, c42d000.spmi:pmic@1:gpio@8800:
>  gpio1 : in   low  normal  vin-0 pull-down 10uA              push-pull  low     atest-1 dtest-0
>  gpio2 : in   low  normal  vin-0 pull-down 10uA              push-pull  low     atest-1 dtest-0
>  gpio3 : ---
>  gpio4 : ---
>  gpio5 : in   high normal  vin-0 pull-up 30uA                push-pull  low     atest-1 dtest-0
>  gpio6 : in   high normal  vin-1 pull-up 30uA                push-pull  low     atest-1 dtest-0
>  gpio7 : out  high func1   vin-1 no pull                     push-pull  low     atest-1 dtest-0
>  gpio8 : in   low  normal  vin-0 pull-down 10uA              push-pull  low     atest-1 dtest-0
>  gpio9 : in   low  normal  vin-0 pull-down 10uA              push-pull  low     atest-1 dtest-0
>  gpio10: out  high normal  vin-1 no pull                     push-pull  low     atest-1 dtest-0
>  gpio11: out  high normal  vin-1 no pull                     push-pull  low     atest-1 dtest-0
>  gpio12: in   low  normal  vin-1 pull-down 10uA              push-pull  low     atest-1 dtest-0
>
> gpiochip2: GPIOs 530-537, parent: platform/c42d000.spmi:pmic@2:gpio@8800, c42d000.spmi:pmic@2:gpio@8800:
>  gpio1 : in   low  normal  vin-0 pull-down 10uA              push-pull  low     atest-1 dtest-0
>  gpio2 : in   low  normal  vin-0 pull-down 10uA              push-pull  low     atest-1 dtest-0
>  gpio3 : in   low  normal  vin-0 pull-down 10uA              push-pull  low     atest-1 dtest-0
>  gpio4 : out  high normal  vin-1 pull-down 10uA              push-pull  medium  atest-1 dtest-0
>  gpio5 : in   low  normal  vin-1 pull-down 10uA              push-pull  low     atest-1 dtest-0
>  gpio6 : out  high normal  vin-1 pull-down 10uA              push-pull  low     atest-1 dtest-0
>  gpio7 : in   low  normal  vin-0 pull-down 10uA              push-pull  low     atest-1 dtest-0
>  gpio8 : out  low  normal  vin-1 pull-down 10uA              push-pull  low     atest-1 dtest-0
>
> Johan

Ah, makes more sense in the context of mixed good and dangling output.

Nevermind my comment.

Bart