Re: [PATCH V2 1/3] dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P

[Dmitry Baryshkov]

On Wed, Oct 30, 2024 at 12:23:57PM +0530, Raviteja Laggyshetty wrote:
> 
> 
> On 10/26/2024 8:15 PM, Dmitry Baryshkov wrote:
> > On Sat, Oct 26, 2024 at 12:30:56PM +0000, Raviteja Laggyshetty wrote:
> >> Add Epoch Subsystem (EPSS) L3 interconnect provider binding on
> >> SA8775P SoCs.
> >>
> >> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@xxxxxxxxxxx>
> >> ---
> >>  .../devicetree/bindings/interconnect/qcom,osm-l3.yaml         | 4 ++++
> >>  1 file changed, 4 insertions(+)
> >>
> >> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
> >> index 21dae0b92819..042ca44c32ec 100644
> >> --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
> >> +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
> >> @@ -34,6 +34,10 @@ properties:
> >>                - qcom,sm8250-epss-l3
> >>                - qcom,sm8350-epss-l3
> >>            - const: qcom,epss-l3
> >> +      - items:
> >> +          - enum:
> >> +              - qcom,sa8775p-epss-l3
> >> +          - const: qcom,epss-l3-perf
> > 
> > Why is it -perf? What's so different about it?
> 
> The EPSS instance in SA8775P uses PERF_STATE register instead of REG_L3_VOTE to scale L3 clocks.
> So adding new generic compatible "qcom,epss-l3-perf" for PERF_STATE register based l3 scaling.

Neither sm8250 nor sc7280 use this compatible, while they also use
PERF_STATE register.

> 
> 
> > 
> >>  
> >>    reg:
> >>      maxItems: 1
> >> -- 
> >> 2.39.2
> >>
> > 
> 

-- 
With best wishes
Dmitry